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Dismiss [### Senior Digital Design Engineer - RTL / VHDL / System Verilog](/clickout/50a4705545df44a9?ql=ql&sig=a9b534da57389a3eb3d79da60c5acdff7443878b&e=2QEEBlhmuuBLtfx9fSFWvqF2BdXqyS9aWnSCm6lXgEI5jOeBigDi_XDSMz-q4-EmZRRzL8Ps3TZ39yyJIICppPAj_iyf9gagPykl9e66TVaDRzxEaAvhJPfdLf2pzTaXlOAydXBtO1QN0ayrm-NuxTvoMEfIE0aPDle6FDKlzmMWRN5nUQUDHCYd2gWc3QAbkcOopnHvbQ_frbSBZbbwX302DbrIh_Ly20JkhQS4w5Ed1X5Bb1yZZhZwDSdDhb4j0TjQJH0khBezts5rA5naR2-pIk5IX3B3a1wr_eNwaMXHkf3IH3dbf5JTBAqxOjtuRH60vtQlpDYIQ-T6qpKNvbFKwBACD6CVqP8_rIHwezRlFgCvrLb5KXCR9BTzY-ScfJipbsfrI-4UkLrcgkYQn85JSYb5iUSza_xn9oBzekyAh2PeXII233mZVWqsGQteHGV93FFJzjJWh9LVACC5WxrGV_OBekaUSf1WpeAkA-GCe-faoAHhu4FWvtNmNWp2pSgSxbFFQ459ND5KN8jdcpFmh4EN0Klilg4hnlErVe_S8SpuH5r4h9vDxqYrnfLuT3ZEpGmeU4CMYXpZMZ1-8sMOAYpfINaR2jzwPBWCRHHPbEgkJfAb9iNmlcno4yCE2jBG9Mro2sYKyAbSiIrAlneT4TX4WGdA-eRcOd7BeCfb5NGrS7Ck5DX_ki9Pz6_FiEWWOXTmTXU2aas2OGh1iFRQGB7KEPVfJFN5WHrI1Es1bLF265pK7QDVdod_1NkzqDlh9xrUOVIlPM6kZTHuOQ-O-5K1eunRB647QxX63zXA0l14JZC32eXUtJ_Z4eTK7aLYSLuowe4x3c_N12C8B9rK87oB9dC3wO1DXOWIyb2pKxofHbJ5szCROef0vhBaatrelTcPtxaeKgs2VxWYN0u89_B8KNFvTWmz-rAtfALKW5rA0oXUJMeVCke8KCdUOV_vVFUWeEX6q1c1oULEuPLlh6cLJr02I6HlBuBTNruFVr8I6CECzWJLaiDHNrisDO_BkYE2xYxIGiJBcNiwUzYZ63qAYrbUJ4-ieVhch_3w48pSPHGqtX8b5GaafHQA3tkCV25BZdgEZ1sxCykq97mQzFjxzY4STWgB_E67Q56QuiRm8qpNqm_g613uhL5HaGJvKrc-2WG32nA7SQOfcyhGkAlFtpgg9BcAuuRYdOrcjMUp1D82ncA_Lwsvz546hEHn_hy8R4Xq7jzypgZ_ZZoePVuc1x_dZBjhw8Kweu9auDsqDtNB3KyQXFTVKoC3x6syDpHBTgJVTjOhMLn8dKissdk_Poczh4F1BMdFQKUgPp036YVkxUD59ZDd-LXApJTdANVSON_N8MGDW9m_TNRsH_6u-ffXTSAvS7N_DGoOcvLmEk9NhSKdbLanKVoE8TuAkT8EmiuAUl6tuahk8k9_15HBD0-sFJA1zUvEer1d2XcZFYgf4zomhG9kWF0tzF0wWcTmcYzVzJR36Vp-4pT0TqWL6ZWfn83c5w1ITnioIe8sywJcqRXSnbz_D-09nOwVOg&prev=RQ9D782A104B9CD0) * European Tech Recruit * Caen * April 2 Keywords Semiconductor / Digital IC Design / *Python* / System Verilog / RTL By applying to this role you ... flow RTL Design and Verification experience Experience with tools such as System Verilog, VHDL, Perl, *Python* report probem Email me future jobs like these → Email me future jobs like these: OK * 1 * 1 ### Caen Region ![Normandy](/public/img/coa/fr.normandie.png "Coat of arms of Normandy") [Normandy](/in/normandie/python "English jobs in Normandy") [Caen on Wikipedia](https://en.wikipedia.org/wiki/Caen) #### python in Cities... * 802 ![Paris](/public/img/coa/fr.paris.png "Coat of arms of Paris") [Paris](/in/paris/python "English jobs in Paris") * 101 ![Toulouse](/public/img/coa/fr.toulouse.png "Coat of arms of Toulouse") [Toulouse](/in/toulouse/python "English jobs in Toulouse") * 79 ![Lyon](/public/img/coa/fr.lyon.png "Coat of arms of Lyon") [Lyon](/in/lyon/python "English jobs in Lyon") * 76 ![Grenoble](/public/img/coa/fr.grenoble.png "Coat of arms of Grenoble") [Grenoble](/in/grenoble/python "English jobs in Grenoble") * 61 ![Bordeaux](/public/img/coa/fr.bordeaux.png "Coat of arms of Bordeaux") [Bordeaux](/in/bordeaux/python "English jobs in Bordeaux") * 40 ![Lille](/public/img/coa/fr.lille.png "Coat of arms of Lille") [Lille](/in/lille/python "English jobs in Lille") * 40 ![Rennes](/public/img/coa/fr.rennes.png "Coat of arms of Rennes") [Rennes](/in/rennes/python "English jobs in Rennes") * 36 ![Nantes](/public/img/coa/fr.nantes.png "Coat of arms of Nantes") [Nantes](/in/nantes/python "English jobs in Nantes") * 34 ![Nanterre](/public/img/coa/fr.nanterre.png "Coat of arms of Nanterre") [Nanterre](/in/nanterre/python "English jobs in Nanterre") * 33 ![Marseille](/public/img/coa/fr.marseille.png "Coat of arms of Marseille") [Marseille](/in/marseille/python "English jobs in Marseille") * 31 ![Cannes - Crasse](/public/img/coa/fr.grasse.png "Coat of arms of Cannes - Crasse") [Cannes - Crasse](/in/grasse/python "English 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