
Senior Emulation Engineer will define emulation strategy, specify RTL modifications, and collaborate on verification strategy for complex multi-chiplet/multi-socket CPUs. Responsibilities include developing emulation workflows, optimizing workflows, generating emulation models, and providing user support. The role requires at least 10 years of digital ASIC experience, 7 years of experience on emulation platforms, and knowledge of modern CPU architecture, verification tools, embedded C, Python, HDL, and bash. Leadership, flexibility, adaptability, autonomy, and responsibility are also required.