240 English-speaking jobs in Provence-Alpes-Côte d'Azur

  • ARM
  • valbonne
  • October 13
Analyze SoC performance bottlenecks using simulation and hardware emulation on pre-silicon platforms. Investigate CPU, interconnect, memory, and I/O behavior under realistic workloads. Requires 3+ years experience and strong computer/system architecture knowledge.
  • Radisson Hotel Group
  • Nice
  • October 13
  • hospitality
LogoExperienced Operations Manager to lead day-to-day hotel operations at Radisson Blu Nice. Responsibilities include driving operational excellence, enhancing guest experience, and developing leaders across departments.
  • Givaudan
  • avignon
  • October 13
Lead the Packaging Compliance Hub, ensuring regulatory alignment and governance. Provide technical expertise across design, material selection, and sustainability initiatives. Manage customer queries and support packaging transitions globally.
  • Cross Border Talents
  • Nice
  • October 13
  • remote work
  • part-time
LogoRemote Recruiter needed to source, screen, and match exceptional candidates for top roles across diverse industries in the EU market. Requires exceptional English communication skills and availability for 25-30 hours weekly.
  • NXP Semiconductors
  • Valbonne
  • October 12
Develop industrial test solutions (hardware and software) for mass production of Automotive Radar products. This role involves creating test strategies, ATE hardware, and supporting design from specification through release.
  • NXP Semiconductors
  • valbonne
  • October 12
Senior Principal Test Engineer to develop industrial test solutions (hardware and software) for mass production of Automotive Radar products. Requires 10+ years of Analog, RF/mmW test development experience using ATE systems.
  • ARTERIS IP
  • Biot
  • October 12
Principal Design Verification Engineer to design and deliver interconnect memory hierarchy solutions for sophisticated SoCs. Responsibilities include UVM test bench development, RTL verification, and improving verification processes using scripting.
  • ARTERIS IP
  • biot
  • October 12
Principal Design Verification Engineer to design and deliver interconnect & memory hierarchy solutions for sophisticated SoCs. Responsibilities include UVM test bench development, RTL verification, and improving verification processes using scripting languages and Arm AMBA protocols.
  • Prodasynth
  • Grasse
  • October 12
Accounting Assistant role involving accounts payable, accounts receivable, cash collection, and master data management. Requires 2+ years of experience and knowledge of day-to-day accounting operations.
  • Amadeus
  • villeneuve loubet
  • October 11
Senior Solution Development Engineer supports the Revenue Management Engineering team by driving roadmap execution, release planning, and process improvement. This role bridges engineering and stakeholders, focusing on operational excellence and AI adoption. Requires 7+ years in technical delivery.
  • SBM Offshore
  • Carros
  • October 10
  • student
  • no experience
LogoSix-month internship in Acoustic/Carros involving laboratory R&D on acoustic separation technologies. Tasks include executing liquid-liquid separation experiments, assembling test setups, and analyzing experimental data. Candidates should be engineering or science students.
  • Idemia
  • Meyreuil
  • October 10
LogoDigital Design Engineer role involving product feasibility studies and development for Smartcard secure element chips. Responsibilities include integrating/verifying digital blocks and developing simulation environments. Requires a Master's in electronic engineering and 5+ years in complex digital block development.
  • Idemia
  • Meyreuil
  • October 10
LogoLead hardware security enhancement for chips in the Digital Design, Integration, and Verification team. Integrate and verify security improvements like PKI, AES, and TDES, while understanding evolving attacks. Requires expertise in cryptography and relevant engineering.
  • Alan
  • Marseille
  • October 10
Senior Revenue Ops role focusing on sales effectiveness. Own end-to-end initiatives, designing and building solutions using low-code tools, AI, Salesforce, and SQL to optimize the sales organization.
  • Amadeus
  • Nice
  • October 9
LogoLead Services Operations for budget, capacity, and resource needs within Travel Unit Engineering. Operationalize and improve resource and budget management, coordinating planning, governance, and recruitment requests across cross-functional teams.
  • SiPearl
  • Valbonne
  • October 8
  • visa sponsorship
LogoSenior IP subsystem SoC architect will define, drive, and evolve IP, subsystem, and SoC architectures. Responsibilities include breaking down architectures into functional sub-blocks, writing specifications, and supporting RTL, physical design, verification, and software prototyping teams.
  • SiPearl
  • Valbonne
  • October 8
  • visa sponsorship
LogoSenior FPGA Prototyping Engineer to design and improve the FPGA prototyping workflow for complex CPU designs. Responsibilities include generating, testing, and debugging platforms from RTL using state-of-the-art FPGAs.
  • SiPearl
  • Valbonne
  • October 8
  • visa sponsorship
LogoSenior Emulation Engineer/Team Lead to drive emulation strategy and workflows for complex CPUs. Lead the team, define project tasks, and optimize platform deliveries using ASIC and emulation platform expertise.
  • SiPearl
  • Valbonne
  • October 8
  • visa sponsorship
LogoDefine, document, and drive system architecture for cutting-edge HPC systems. Lead architectural engagements with partners and customers to design optimized HPC nodes. Develop integration, performance measurement, and optimization tools. Contribute to collaborative projects, technical deliverables, and partner workshops. Support customers in migrating applications toward new system architectures.
  • SiPearl
  • Valbonne
  • October 8
  • visa sponsorship
LogoEmulation Engineer role at SiPearl involves contributing to emulation setup, RTL adaptation, and pre-silicon verification. Key tasks include developing workflows, maintaining models, and supporting platform users. Requires 6+ years in digital ASIC and 4+ years on emulation platforms.
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