50 English-speaking jobs in Aix-en-Provence

Senior Analyst to drive marketplace, pricing, and promotional decisions. Analyze datasets, collaborate with marketing teams, and develop strategies to optimize customer value.

Site Quality Engineer to assist the Quality Manager and Project Team in fulfilling client requirements and following established quality procedures. Responsibilities include on-site quality control/assurance, managing non-conformities, and ensuring compliance with quality procedures. Requires an Electrical/Mechanical Engineering background and site quality inspection experience. Knowledge of ISO14001 / ISO9001 management systems is also required.

Experienced AI Engineer to design, deploy, and optimize multi-agent architectures for a production-grade AI Agent Platform. Responsibilities include multi-agent orchestration, backend platform architecture, production-grade evaluation, and ensuring system resiliency and scalability. Requires expert-level Python, deep experience with LLM APIs and agent frameworks, and strong backend architecture, Docker, CI/CD, and cloud infrastructure knowledge. Proven track record of building and maintaining AI applications in production, with a focus on deterministic behavior, error handling, and cost optimization.

Site Quality Engineer to assist the Quality Manager and Project Team in fulfilling client requirements and following established quality procedures. Responsibilities include managing non-conformities, conducting on-site quality inspections, and ensuring compliance with quality procedures. Requires an Electrical/Mechanical Engineering background and site quality inspection experience. Knowledge of ISO14001 / ISO9001 management systems is also required.

As a Junior HR Project Manager, you will support the development of team members, drive the operational deployment of training, and lead annual HR campaigns across France. You will manage training plans, ensure campaign compliance, and support corporate people initiatives.

The S&M Sales Representative develops and manages customer relationships, identifies sales opportunities, and negotiates commercial and technical offers. They analyze market trends, propose solutions to customer needs, and ensure the follow-up and achievement of sales objectives.

Provides advanced technical support, training, and product expertise for OEM columns, including FIB, SEM, and GIS. Resolves complex technical issues, tracks issues to resolution, and acts as the primary technical interface between OEM customers and internal teams. Develops and maintains service documentation and contributes to product obsolescence analysis. Requires a Master's degree in a related field and significant experience in technical support, service engineering, or within an OEM environment.

This role supports monthly financial reporting, variance analysis, and the month-end close process. The financial analyst will build Excel models, assist with budgets and forecasts, and support the year-end audit.

Drive sales and close deals for construction, mobility, and industry customers. Manage and grow customer platforms, focusing on high-potential accounts. Promote application-based selling and position Berner as a premium brand. Analyze sales area KPIs and report to superiors.

Ferrovial Construction France seeks a student intern for the Iter Project in Southern France. Responsibilities include production control, project planning, subcontractor management, and cost estimation. Requirements: Industrial, Mechanical, or Electrical Engineering degree, minimum B2 English, and a driver's license.

Design engineer to develop features and reference designs for Rambus PCIe / CXL controller IP. Responsibilities include FPGA prototyping, hardware validation, and quality checks. Requires RTL coding (Verilog / VHDL) and a Master's degree or PhD in Electrical Engineering, Computer Engineering, or equivalent.

Site Quality Engineer to assist the Quality Manager and Project Team in fulfilling client requirements and following established quality procedures.

Senior Design engineer to contribute to the architecture and design of next generation PCIe and CXL IP. Responsibilities include implementing designs in System Verilog, collaborating with the verification team, and prototyping IPs on FPGAs. Requires 5+ years of RTL design experience and a Master's degree or PhD in a relevant field.

Senior Design engineer to contribute to the architecture and design of next generation PCIe and CXL IP. Responsibilities include implementing designs in System Verilog, collaborating with the verification team, and prototyping IPs on FPGAs. Requires a Master's degree or PhD in Electrical Engineering, Computer Engineering or equivalent and 7+ years of RTL Design experience.

Senior Design engineer to contribute to the architecture and design of next generation PCIe and CXL IP. Responsibilities include implementing designs in System Verilog, collaborating with the verification team, and prototyping IPs on FPGAs. Requires a Master's degree or PhD in Electrical Engineering, Computer Engineering or equivalent, 5+ years of RTL Design experience, and knowledge of PCIe/CXL.

Experienced Meshing Algorithm Engineer to design, enhance, and optimize advanced meshing technologies for engineering simulation workflows. Develop and optimize 2D and 3D meshing algorithms in C/C++. Collaborate with global engineering teams on software development and testing.

Senior Design engineer to contribute to the architecture and design of next generation PCIe and CXL IP. Responsibilities include implementing designs in System Verilog, collaborating with the verification team, and prototyping IPs on FPGAs. Requires 7+ years of RTL design experience and a Master's degree or PhD in Electrical Engineering, Computer Engineering, or equivalent.

Ferrovial Construction France seeks a student intern for the Iter Project in Southern France. Responsibilities include production control, project planning, subcontractor management, and cost estimation. Applicants must be pursuing or completing a degree in Industrial, Mechanical, or Electrical Engineering and have a minimum B2 English level and a driver's license.

Design engineer to develop features and reference designs for Rambus PCIe/CXL controller IP. Responsibilities include FPGA prototyping, hardware validation, and quality checks. Requires RTL coding (Verilog/VHDL), a Master's degree or PhD in a relevant field, and 2+ years of experience.

Vibro-Acoustics Engineer to coordinate and manage noise and vibration engineering activities across large-scale technical programs. Will act as a technical interface between design engineering, test activities, and project delivery teams. Requires a Master's degree in Mechanical Engineering, Physics, or related field with 5+ years of experience in vibro-acoustics, vibration analysis, or physical measurements.