68 English-speaking jobs in Cannes - Crasse

  • CADENCE FRANCE
  • Valbonne
  • October 22
  • student
  • no experience
LogoIntern to investigate analog and digital circuit options for monitoring process variations in advanced node microelectronics. The role involves designing and benchmarking circuits at the intersection of circuit design and semiconductor physics.
  • CADENCE FRANCE
  • Valbonne
  • October 21
  • student
  • no experience
LogoFinal-year engineering student to intern with the ATE Test team, applying AI and machine learning to analyze semiconductor test results. Develop Python tools to identify patterns and automate data analysis for silicon behavior.
  • ARM
  • valbonne
  • October 19
Job Overview:The Software (CE-SW) group is responsible for developing and improving the software ecosystem around Arm's next generation architectures and systems. This means working with processors and other hardware technology not yet available to the public. You will join a team of Software Engineers who share a passion for leaving their mark on the future of computing.
  • FedEx
  • Vallauris
  • October 15
  • no experience
Operation Support Agents ensure urgent packages reach the right place on time. Responsibilities include answering calls, investigating failed deliveries, and data entry while adhering to FedEx processes.
  • ARM
  • valbonne
  • October 13
Job DescriptionWould you like to investigate performance bottlenecks and contribute to the optimization of future Arm-based System-on-Chips? Are you interested in understanding how CPUs, interconnects, memory systems and I/O components interact in complex pre-silicon environments?
  • NXP Semiconductors
  • valbonne
  • October 12
Significant technical challenges must be overcome to make these products a reality and this journey will provide a truly rewarding experience. We are looking for an AMS, RF&mmWave TEST ENGINEER. In this exciting role, you will be part of a team in charge of the development of Industrial Test Solutions for Mass production.
  • ARTERIS IP
  • biot
  • October 12
DescriptionDo you want to contribute to the backbone of some of the world’s most popular SoCs? As a Senior Staff / Principal Design Verification Engineer at Arteris, you will work with an expert team to design and deliver interconnect & memory hierarchy solutions for some of the world's most sophisticated mobile, telecom, automotive, and consumer SoC designs.
  • Fortinet
  • valbonne
  • October 11
Ideally, candidates will be based locally or within commuting distance of the office. Fortinet EMEA payroll team forms part of the Finance department. The payroll team has overall responsibility for the gathering and collating of information from other departments including the process complex payroll items including RSUs and Stocks.
  • Amadeus
  • villeneuve loubet
  • October 11
Job TitleSenior Solution Development EngineerWe are seeking a Solution Development Engineer in our team to support and guide the Revenue Management Engineering team across multiple locations. Reporting to the Manager, Engineering, the Senior Solution Development Engineer will support the team in driving engineering roadmap execution, release planning, process improvement and governance.
  • Fortinet
  • valbonne
  • October 9
The Consulting Systems Engineer role is an overlay mission to bring expertise to the different regions working together closely with Sales, Sales Engineers and Subject Matter Experts. The roles primary focus is to relay the expertise with Public Cloud to the sales teams, customer and partners, conduct PoVs, and research integration with Fortinet’s comprehensive cybersecurity offerings.
  • Inetum
  • Biot
  • October 9
LogoEnglish speaking Business Analyst joins an agile, international Scrum team to define, design, and test travel industry solutions. Responsibilities include requirement analysis, solutioning, writing functional specifications, and executing tests. An IT degree or master's is mandatory.
  • Inetum
  • biot
  • October 9
Every day, the group's 28,000 consultants and specialists aim to make a digital impact for businesses, public sector bodies and society as a whole: solutions that contribute to performance, innovation and the common good.
  • SiPearl
  • Valbonne
  • October 8
  • visa sponsorship
LogoSenior IP subsystem SoC architect will define, drive, and evolve IP, subsystem, and SoC architectures. Responsibilities include breaking down architectures into functional sub-blocks, writing specifications, and supporting RTL, physical design, verification, and software prototyping teams.
  • SiPearl
  • Valbonne
  • October 8
  • visa sponsorship
LogoSenior CAD flow engineer will define, deploy, and improve ASIC development methodology and design flow. Responsibilities include leading tool evaluation and optimization, providing technical support to development teams, and acting as a technical interface with vendors.
  • SiPearl
  • Valbonne
  • October 8
  • visa sponsorship
LogoSenior Emulation Engineer/Team Lead to drive emulation strategy and workflows for complex CPUs. Lead the team, define project tasks, and optimize platform deliveries using ASIC and emulation platform expertise.
  • SiPearl
  • Valbonne
  • October 8
  • visa sponsorship
LogoDefine, document, and drive system architecture for cutting-edge HPC systems. Lead architectural engagements with partners and customers to design optimized HPC nodes. Develop integration, performance measurement, and optimization tools. Contribute to collaborative projects, technical deliverables, and partner workshops. Support customers in migrating applications toward new system architectures.
  • SiPearl
  • Valbonne
  • October 8
  • visa sponsorship
LogoSenior FPGA Prototyping Engineer to design and improve the FPGA prototyping workflow for complex CPU designs. Responsibilities include generating, testing, and debugging platforms from RTL using state-of-the-art FPGAs.
  • SiPearl
  • Valbonne
  • October 8
  • visa sponsorship
LogoEmulation Engineer role at SiPearl involves contributing to emulation setup, RTL adaptation, and pre-silicon verification. Key tasks include developing workflows, maintaining models, and supporting platform users. Requires 6+ years in digital ASIC and 4+ years on emulation platforms.
  • Evac Group
  • Antibes
  • October 7
LogoExperienced Project Engineer needed to manage complex Engineer-to-order projects in a marine environment. Own technical scope, lead discussions with shipyards and customers, and ensure successful project execution from handover to delivery.
  • MARINESCENCE
  • Vallauris
  • October 6
  • student
LogoHR/Service Relations Intern needed for a yachting recruitment agency. Assist with sourcing, recruitment, selection, database updates, and HR operations. Master's student preferred; English fluency is essential.
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