61 English-speaking jobs in Cannes - Crasse

AMS Verification Engineer needed to verify complex Analog/Mixed-Signal ICs. Responsibilities include developing verification plans, creating UVM/SystemVerilog environments, and performing mixed-signal simulations. Requires 8+ years of experience and a relevant advanced degree.

International Business Developer to drive growth in the International Enterprise Business Applications market. Responsibilities include prospecting, designing commercial strategies, and developing sales pipelines for Microsoft Dynamics 365 Business Central.

This hybrid role requires hands-on technical ownership of building systems at the Sophia Antipolis site while standardizing maintenance and technical practices across EMEA. Responsibilities include site operations, vendor management, and process improvement.

Lead security evaluations and certification programs, coordinating with external laboratories. Ensure products meet industry standards and regulatory requirements using frameworks like Common Criteria and FIPS. Requires 10+ years in product security.

Assist Finance Manager with reporting, preparing dashboards, and analyzing complex data sets. This role requires hospitality finance experience, data visualization tool proficiency, and fluent English.

Seeking a full-time junior travel nanny for a 20-month-old in Cannes. Must hold both EU and USA passports. Requires experience with young children, including sole charge, and fluency in English.

Senior Software Engineer focusing on mobile. Own features end-to-end across iOS, Android, Kotlin Multiplatform, and backend APIs. Requires 3+ years building production mobile products with full-scope contribution.

Sr Mixed Signal/RF Test Engineer develops industrial test solutions (hardware/software) for mass production. Requires 5-10 years of RF/mmW test development experience using ATE systems.

Final-year engineering or Master’s student intern for SRAM development. Topics include Advanced SRAM Design, Statistical Yield Optimization, or Power Characterization Methodology for Memory Compilers.

Final-year engineering student to intern with the ATE Test team, exploring how AI and automation can improve test development and debugging workflows. Develop Python-based AI prototypes for semiconductor test analysis.

Package Handler role involves sorting, scanning, loading, and unloading packages in a fast-paced environment. Requires being a team player with excellent attention to detail and the ability to make quick, accurate decisions.

Intern to investigate analog and digital circuit options for monitoring process variations in advanced node microelectronics. The role involves designing and benchmarking circuits at the intersection of circuit design and semiconductor physics.

Contexte et atouts du poste This postdoc is in the framework of Inria research initiative on Federated Learning, FedMalin The candidate will join NEO project-team NEO is positioned at the intersection of Operations Research and Network Science.

Final-year engineering student to intern with the ATE Test team, applying AI and machine learning to analyze semiconductor test results. Develop Python tools to identify patterns and automate data analysis for silicon behavior.

Principal Software Engineer to own the product technical architecture and delivery of the AI NW software stack. Responsibilities include system design, performance optimization, and collaboration with global partners. Requires deep C/C++ proficiency and networking software expertise.

Senior Software Engineer focused on system-level validation and quality for SoC platforms. Develop test automation, investigate complex issues, and contribute to CI and regression infrastructure using Python, C, and C++.

Operation Support Agents ensure urgent packages reach the right place on time. Responsibilities include answering calls, investigating failed deliveries, and data entry while adhering to FedEx processes.

Analyze SoC performance bottlenecks using simulation and hardware emulation on pre-silicon platforms. Investigate CPU, interconnect, memory, and I/O behavior under realistic workloads. Requires 3+ years experience and strong computer/system architecture knowledge.

Senior Principal Test Engineer to develop industrial test solutions (hardware and software) for mass production of Automotive Radar products. Requires 10+ years of Analog, RF/mmW test development experience using ATE systems.

Principal Design Verification Engineer to design and deliver interconnect & memory hierarchy solutions for sophisticated SoCs. Responsibilities include UVM test bench development, RTL verification, and improving verification processes using scripting languages and Arm AMBA protocols.