39 English-speaking jobs in Cannes - Crasse

Design and implement a next-generation agentic AI system integrating Knowledge Graphs (KG), Large Language Models (LLMs), and autonomous agents to power SAP service and support capabilities. Construct a rich, multi-source knowledge graph by ingesting and connecting heterogeneous SAP data. Develop LLM-powered agents capable of reasoning over interconnected knowledge and translating complex natural language queries into SPARQL.

Service Reliability Engineer (SRE) or DevOps will accelerate application delivery by developing automation for managed services. Responsibilities include building tools and processes, scripting automation, and collaborating with various teams on projects.

As a Team Manager, you will lead, train, and coach a team to achieve sales goals and deliver exceptional client experiences. You will be responsible for team development, performance management, client-centric training, and fostering a positive work environment.

Network Security QA Engineer role involves post-sales testing to replicate customer environments. Requires strong network security experience, knowledge of TCP/IP, and proficiency with tools like Spirent/Ixia.

Senior Principal Test Engineer develops industrial test solutions (hardware and software) for mass production of Analog/RF&mmWave products. This role involves test strategy, ATE development, and supporting design from specification through release.

Consulting Systems Engineer relays Public Cloud expertise to sales teams, customers, and partners. Responsibilities include conducting PoVs, researching integrations, and supporting technical discussions for Fortinet's cybersecurity offerings.

Senior CAD flow engineer will define, deploy, and improve ASIC development methodology and design flow. Responsibilities include leading tool evaluation and optimization, providing technical support to development teams, and acting as a technical interface with vendors.

Senior IP subsystem SoC architect will define, drive, and evolve IP, subsystem, and SoC architectures. Responsibilities include breaking down architectures into functional sub-blocks, writing specifications, and supporting RTL, physical design, verification, and software prototyping teams.

SiPearl is seeking passionate individuals to contribute to the development of Rhea, a European microprocessor for supercomputing and AI.

Senior FPGA Prototyping Engineer to design and improve the FPGA prototyping workflow for complex CPU designs. Responsibilities include generating, testing, and debugging platforms from RTL using state-of-the-art FPGAs.

System Software Validation Engineer to ensure quality and reliability of software solutions. Design and execute test strategies, develop test cases, and verify firmware/software stacks. Requires 7+ years in software testing and strong technical knowledge.

Senior Emulation Engineer/Team Lead to drive emulation strategy and workflows for complex CPUs. Lead the team, define project tasks, and optimize platform deliveries using ASIC and emulation platform expertise.

Define, document, and drive system architecture for cutting-edge HPC systems. Lead architectural engagements with partners and customers to design optimized HPC nodes. Develop integration, performance measurement, and optimization tools. Contribute to collaborative projects, technical deliverables, and partner workshops. Support customers in migrating applications toward new system architectures.

Emulation Engineer role at SiPearl involves contributing to emulation setup, RTL adaptation, and pre-silicon verification. Key tasks include developing workflows, maintaining models, and supporting platform users. Requires 6+ years in digital ASIC and 4+ years on emulation platforms.

Leads growth of the retrofit business by developing and executing go-to-market strategies and value propositions. Manages complex sales cycles, negotiates deals, and builds client relationships. Drives sustainable growth through pipeline development, customer engagement, and strategic account management.

Experienced Project Engineer needed to manage complex Engineer-to-order projects in a marine environment. Own technical scope, lead discussions with shipyards and customers, and ensure successful project execution from handover to delivery.

Principal Design Verification Engineer to design and deliver interconnect & memory hierarchy solutions for sophisticated SoCs. Responsibilities include UVM test bench development, RTL verification, and improving verification processes using scripting.

Senior Satellite Systems Engineer provides resident systems engineering support across satellite procurement phases, overseeing spacecraft Design, Assembly, Integration, and Launch. Responsibilities include reviewing test data and mitigating technical risks.

Lead SoC Interconnect Technology Team to drive architecture and design of coherent/non-coherent interconnect solutions. Requires 15+ years in SoC architecture with expertise in scalable fabrics, performance, and power optimization.