73 English-speaking jobs in Cannes - Crasse

Senior Solution Development Engineer transforms high-level product vision into detailed functional and technical requirements. This role designs solutions, develops prototypes, and aligns stakeholders to ensure viable, scalable technical implementation.

Define architecture for AI-native travel capabilities consumed by external AI assistants. Design scalable solutions exposing Amadeus services via APIs, agent-ready services, and semantic interfaces. Lead technical strategy in the evolving AI ecosystem.

Senior HW Digital Design Verification Engineer develops verification plans and testbenches for complex digital blocks using UVM and SystemVerilog. Requires 5+ years in ASIC/SoC verification.

English speaking Business Analyst needed in an agile, international environment. Responsibilities include defining, designing, and testing solutions for the travel industry, writing functional specifications, and collaborating with development teams.

Senior CAD flow engineer will define, deploy, and improve ASIC development methodology and design flow. Responsibilities include leading tool evaluation and optimization, providing technical support to development teams, and acting as a technical interface with vendors.

Senior IP subsystem SoC architect will define, drive, and evolve IP, subsystem, and SoC architectures. Responsibilities include breaking down architectures into functional sub-blocks, writing specifications, and supporting RTL, physical design, verification, and software prototyping teams.

Senior Camera Algorithm Architect needed for mobile imaging R&D. Requires 15+ years experience in mobile imaging systems, deep expertise in computational algorithms, and cross-domain collaboration.

Contribute to a new Automotive System and Platform architecture organization. Define System and Software Architecture solutions for CoreRide platforms, analyzing trade-offs in network topologies, safety, and performance. Requires 8+ years in the automotive market.

Senior FPGA Prototyping Engineer to design and improve the FPGA prototyping workflow for complex CPU designs. Responsibilities include generating, testing, and debugging platforms from RTL using state-of-the-art FPGAs.

Senior Emulation Engineer/Team Lead to drive emulation strategy and workflows for complex CPUs. Lead the team, define project tasks, and optimize platform deliveries using ASIC and emulation platform expertise.

Define, document, and drive system architecture for cutting-edge HPC systems. Lead architectural engagements with partners and customers to design optimized HPC nodes. Develop integration, performance measurement, and optimization tools. Contribute to collaborative projects, technical deliverables, and partner workshops. Support customers in migrating applications toward new system architectures.

Emulation Engineer role at SiPearl involves contributing to emulation setup, RTL adaptation, and pre-silicon verification. Key tasks include developing workflows, maintaining models, and supporting platform users. Requires 6+ years in digital ASIC and 4+ years on emulation platforms.

Experienced Project Engineer needed to manage complex Engineer-to-order projects in a marine environment. Own technical scope, lead discussions with shipyards and customers, and ensure successful project execution from handover to delivery.

Seeking an enthusiastic HR/Service Relations Intern for Marinescence. Assist with sourcing, recruitment, selection, and database management in the yachting industry. Requires Master's studies, MS Office proficiency, and English fluency.

Senior Software Engineer focused on system-level validation and quality for SoC platforms. Develop test automation, investigate complex issues, and contribute to CI and regression infrastructure using Python, C, and C++.

Senior DevOps & Software Engineer to own the deployment and architecture of the Fed-BioMed open-source framework. This role bridges research and production systems across TwinRISE and FedOps projects.

Senior Digital Design Engineer for the Bluetooth IP team. Own macro/sub-system architecture, design, and verification for advanced Bluetooth/15.4 MAC, PHY, and platform solutions. Requires 12+ years in digital design and strong Verilog/SystemVerilog expertise.

Staff Software Engineer to enable the Arm AGI CPU software ecosystem by developing production-quality firmware and low-level system software. Requires strong Embedded C, concurrency, and low-level hardware interaction skills.

DevOps Engineer to enhance development and deployment processes by automating workflows and ensuring system reliability. Responsibilities include optimizing tools, automating tasks, and managing incidents. Requires a Master's degree and skills in Linux, Docker, Kubernetes, Bash, Python, and CI/CD tools.

AI/ML Speech Algorithm Engineer to develop cutting-edge speech AI for hearables. Responsibilities include end-to-end algorithm contribution, model optimization for embedded devices, and building evaluation stacks. Requires 5+ years in audio/speech ML.