150 English-speaking jobs in Cannes - Crasse

SiPearl is seeking a Senior FPGA prototyping engineer to design, develop, and improve FPGA prototyping workflows. The role involves generating, testing, and debugging complex FPGA platforms, developing hardware and software blocks, and providing technical support to internal users.

Junior Service Stewardess for a 100m+ private motor yacht. Requires at least one season yachting experience and experience in high-end hospitality. Responsibilities include setting up and serving meals, preparing beverages, and maintaining guest and crew areas.

Senior Emulation Engineer will define emulation strategy, specify RTL modifications, and collaborate on verification strategy for complex multi-chiplet/multi-socket CPUs. Responsibilities include developing emulation workflows, optimizing workflows, generating emulation models, and providing user support. The role requires at least 10 years of digital ASIC experience, 7 years of experience on emulation platforms, and knowledge of modern CPU architecture, verification tools, embedded C, Python, HDL, and bash. Leadership, flexibility, adaptability, autonomy, and responsibility are also required.

Develop a new tool for automatic quality control and image-based information retrieval from brain MRI scans. The project will utilize domain randomization techniques and synthetic datasets to train a domain-agnostic AI system.

Crewing Assistant Intern to support recruitment for luxury yachting. Must have fluent English and be based in the South of France, enrolled in a French university.

Senior Layout Designer will design analog/mixed-signal layouts, collaborate with design engineers, and help improve layout methodologies. Requires knowledge of semiconductor physics, Cadence Virtuoso Suite, and Calibre verification tools. Bachelor's degree in Electronics Engineering and at least 6 years of experience are needed.

Senior Electronic Design Engineer will define, design, and bring to production mixed signal integrated circuits for serial communications. Requires MSEE with 5+ years analog design experience in CMOS and/or BiCMOS technologies. Proven track record of silicon success in blocks like Gbps equalizers, CDRs, PLLs, laser drivers, transimpedance amplifiers, ADCs, and DACs. Proficiency with EDA design tools and lab equipment is essential.

Develop and implement automation solutions for NoC component deployment within a team focused on increasing SoC integration productivity. Responsibilities include writing C++ libraries, Python scripts, and contributing to a web platform.

As a Cache Coherency Architect, you will define and optimize cache coherency solutions within Arteris' IP portfolio. You will develop cache-coherent interconnect IP, ensuring seamless integration with other NoC interconnects and system IP. You will collaborate with hardware designers, verification engineers, software developers, and other stakeholders to create high-performance, power-efficient, and reliable NoC IP solutions.

Improve the efficiency of Arm's global emulation infrastructure. Benchmark, optimize, and automate emulation workflows to enhance throughput, utilization, and availability. Collaborate with EDA vendors to integrate automation and streamline job orchestration.

Designs, builds, and scales backend systems for Datadog's Watchdog products. Develops data science-driven features, integrates and preprocesses data from various sources, and ensures scalability. Leverages Python, Java, Scala, or Go, and has experience with microservices, distributed systems, and data pipelines.

Define and optimize cache coherency solutions for Arteris' NoC IP portfolio. Collaborate with hardware designers, verification engineers, and software developers to create high-performance, power-efficient, and reliable NoC IP. Analyze customer requirements for cache-coherent system architectures and set performance goals for configurable IP.

Senior Technical Support Engineer needed for expanding EMEA team. Investigate customer issues, provide technical support via phone and web, and develop solutions using FortiSIEM and other Fortinet products. Requires strong networking, troubleshooting, and communication skills. Five+ years of experience and a Bachelor's degree are required.

The Channel Partner Manager for OT in EMEA will develop and scale the reseller partner ecosystem for Fortinet OT solutions. This role will cultivate OT capable partners who can position, sell, implement, and support Fortinet OT solutions. The individual will act as a bridge between the OT SME Practice and the EMEA Channel Partner organization, driving OT partner development and capability roadmap.

Senior/Staff Software Engineer will develop python-based tools to automate design, verification, and documentation for next-generation Arm Products. Responsibilities include scaling solutions, employing algorithms to improve architecture, and documenting code. Extensive Python coding experience and knowledge of software development processes are required.

Senior Software Engineer in Test will develop automated test cases for firmware and Linux-based systems, drive process improvement in a CI/CD environment, and facilitate issue resolution. Requires experience with testing principles, strategies, and techniques, integration and system validation tests, and programming in C and Python. Experience with embedded systems, bootloaders, Linux kernel, or device drivers is also needed.

As a Product Owner, you will define and manage feature development for Questel's Markify Search tool within an agile environment. You will collaborate with the Product Manager and dev teams, write specifications, and ensure successful delivery of value to customers.

Data Engineer to support a major client. Extract, clean, and analyze data using AI, LLM, and statistical methods. Experience with Python, Pyspark, Scala, and cloud services required.

As an AI Data Engineer, you will convert business problems into hypotheses, build, validate, and deploy models to solve them using methodologies, domain expertise, consulting, software engineering, statistics, and mathematics. You will collect and explore data, create models, and deploy them as code while ensuring their business value throughout their lifecycle.

Postdoctoral researcher to contribute to the HAL4SDV project, developing innovative design/coding environments for Software Defined Vehicles.