53 English-speaking jobs in Cannes - Crasse

Senior Principal Test Engineer develops industrial test solutions (hardware/software) for mass production of Automotive Radar products. Responsibilities include test strategy, ATE development, and supporting design from specification. Requires 10+ years in Analog/RF/mmW test development.

Senior Satellite Systems Engineer provides resident systems engineering support across satellite procurement phases, including Design, Assembly, Integration, and Launch. Responsibilities involve reviewing test data, mitigating technical risks, and ensuring compliance with contractual requirements.

Network Security QA Engineer role involves post-sales testing to replicate customer environments. Requires strong network security experience, knowledge of TCP/IP, and proficiency with tools like Spirent/Ixia.

Senior IP subsystem SoC architect will define, drive, and evolve IP, subsystem, and SoC architectures. Responsibilities include breaking down architectures into functional sub-blocks, writing specifications, and supporting RTL, physical design, verification, and software prototyping teams.

Senior CAD flow engineer will define, deploy, and improve ASIC development methodology and design flow. Responsibilities include leading tool evaluation and optimization, providing technical support to development teams, and acting as a technical interface with vendors.

Define, document, and drive system architecture for cutting-edge HPC systems. Lead architectural engagements with partners and customers to design optimized HPC nodes. Develop integration, performance measurement, and optimization tools. Contribute to collaborative projects, technical deliverables, and partner workshops. Support customers in migrating applications toward new system architectures.

Senior Emulation Engineer/Team Lead to drive emulation strategy and workflows for complex CPUs. Lead the team, define project tasks, and optimize platform deliveries using ASIC and emulation platform expertise.

Senior FPGA Prototyping Engineer to design and improve the FPGA prototyping workflow for complex CPU designs. Responsibilities include generating, testing, and debugging platforms from RTL using state-of-the-art FPGAs.

Emulation Engineer role at SiPearl involves contributing to emulation setup, RTL adaptation, and pre-silicon verification. Key tasks include developing workflows, maintaining models, and supporting platform users. Requires 6+ years in digital ASIC and 4+ years on emulation platforms.

Experienced Project Engineer needed to manage complex Engineer-to-order projects in a marine environment. Own technical scope, lead discussions with shipyards and customers, and ensure successful project execution from handover to delivery.

PhD position focused on spatio-temporal analysis of remote sensing data at large scales. The role involves developing methods for 3D change detection using geometric primitives and analyzing the distribution of these changes to understand urban evolution.

Senior Verification Engineer to verify RTL for ARM SoC features. Requires 5+ years in IP/SOC verification, proficiency in SystemVerilog/UVM, and experience with ARM designs.

Lead SoC Interconnect Technology Team to drive architecture and design of coherent/non-coherent interconnect solutions. Requires 15+ years in SoC architecture with expertise in scalable fabrics, performance, and power optimization.