79 English-speaking jobs in Cannes - Crasse

Digital Design Engineer to join Bluetooth IP team developing state-of-the-art solutions. Define micro-architecture, implement designs, and support validation and customer support. Requires 3+ years of digital design and verification experience, strong Verilog/SystemVerilog skills, and FPGA implementation experience.

Digital Design Engineer to develop Bluetooth IP solutions. Define micro-architecture, implement designs, and support validation and customer support. Requires 3+ years of digital design experience, Verilog/SystemVerilog proficiency, and FPGA implementation skills.

Fortinet seeks experienced technical support engineers for its EMEA team. Candidates will investigate customer issues, provide technical support via phone and web, and develop solutions using FortiSIEM. Strong problem-solving, communication, and technical skills are required. Experience with network management, security protocols, and Linux is essential.

Network Security QA Engineer will implement customer projects, testing Fortinet products in production environments. Responsibilities include defining and executing test cases, documenting test results, and providing technical support. Requires strong network security knowledge, experience with testing tools (Spirent, Ixia), and excellent written and verbal communication skills.

DevOps Engineer to design, improve, and implement automated services for application deployment and management. Responsibilities include automating tasks, collaborating with teams, managing incidents, and participating in key processes. Requires expertise in Linux, Docker, Kubernetes, scripting, CI/CD tools, infrastructure as code, monitoring, and databases.

Leads the execution of solution development for the NXP CoreRide platform, ensuring alignment with customer needs and business objectives. Defines the solution vision, coordinates development progress across Agile Release Trains (ARTs) and suppliers, and supports the solution throughout its lifecycle.

Define and optimize cache coherency solutions for Arteris' NoC IP portfolio. Collaborate with hardware designers, verification engineers, and software developers to create high-performance, power-efficient, and reliable NoC IP solutions. Analyze customer requirements for cache-coherent system architectures and set performance goals for configurable IP.

DevOps Engineer will develop automation to control, build, and deploy managed services. Responsibilities include building tools, leveraging scripting, and collaborating with developers, system engineers, and project management. Requires strong English, Java, J2EE, C++, and experience with SOA, databases, big data stacks, and PaaS.

FPGA Platform Lead for Secure Transactions & Interfaces (STI) team. Develops FPGA verification platforms, interfaces with design and software teams, defines FPGA strategy, and debugs designs. Requires 7+ years of experience in FPGA design flow, SoC architecture, and EDA tools.

Leads innovation projects for Safe AI, translating the Safety & AI roadmap into projects. Defines system safety concepts for AI-driven features and ensures fail-safe or fail-operational behavior. Manages the “Safety & AI” innovation team.

Investigate performance issues and suggest product improvements for Arm's Cloud Server System-on-a-Chip. Analyze the performance of Arm CPUs and Interconnect IPs.

Lead AI Safety definition and implementation for next-gen Automotive Compute Subsystems and complex SoCs for L4 autonomous driving and robotics. Develop safety architectures aligned with ISO 26262, ISO 21448, and other standards.

Senior Verification Engineer to verify RTL for ARM SoC features. Requires 5+ years in IP/SOC verification, proficiency in SystemVerilog/UVM, and experience with ARM designs.

Senior Verification Engineer to verify RTL for ARM SoC features. Requires 3+ years in IP/SOC verification, proficiency in SystemVerilog/UVM, and experience with ARM designs.

Senior NoC Design Engineer to design and develop advanced hardware components for ARTERIS IP products. Requires 8-12 years in SoC/IP/NoC design, expertise in communication protocols, and proficiency in Verilog/SystemVerilog.

Lead the architecture and design of next-generation coherent and non-coherent interconnect solutions for advanced SoCs. Requires 15+ years in SoC architecture with deep expertise in scalable interconnect fabrics and system-level optimization.

The European Society of Cardiology seeks an Association Manager to define and implement strategic direction for groups, ensuring alignment with ESC priorities. The role involves managing group activities, supporting leadership and volunteer engagement, and promoting visibility and impact.

Momji seeks an English nanny for 8 hours weekly to care for one child. Duties include school pickup, snack time, homework help, and playing while speaking English. Previous childcare experience is required.

Leads system-level validation of Wi-Fi IPs, ensuring quality aligned with industry standards and customer requirements. Drives cross-functional collaboration to resolve technical issues and mentor validation engineers.

Experienced Director of Product Marketing needed to drive market success for NFC IoT Security products. This role owns the full product lifecycle, from GTM strategy and positioning to commercial success, collaborating with global teams.