158 English-speaking jobs in Cannes - Crasse

Senior Technical Support Engineer needed for expanding EMEA team. Investigate customer issues, provide technical support via phone and web, and develop solutions using FortiSIEM and other Fortinet products. Requires strong networking, troubleshooting, and communication skills. Five+ years of experience and a Bachelor's degree are required.

The Channel Partner Manager for OT in EMEA will develop and scale the reseller partner ecosystem for Fortinet OT solutions. This role will cultivate OT capable partners who can position, sell, implement, and support Fortinet OT solutions. The individual will act as a bridge between the OT SME Practice and the EMEA Channel Partner organization, driving OT partner development and capability roadmap.

Define and optimize cache coherency solutions for Arteris' NoC IP portfolio. Collaborate with hardware designers, verification engineers, and software developers to create high-performance, power-efficient, and reliable NoC IP. Analyze customer requirements for cache-coherent system architectures and set performance goals for configurable IP.

Lead and contribute to the development of a software stack for configuring and evaluating Arteris' cost-effective Network-on-Chip (NoC) solutions. Define user workflows, specify interoperability layers, and design and develop backend and frontend components.

Internal Consulting Systems Engineer to support, evolve, and automate solutions and tools for the pre-sales department. This role requires cybersecurity expertise, systems engineering, and software development skills with a focus on automation, reliability, and secure-by-design solutions.

Experienced Verification Engineer needed for CPU IP development. Responsibilities include verification strategy development, using simulation, formal, emulation, and modeling tools, and contributing to verification improvement strategies. Requires a solid foundation in Electrical Engineering, Computer Science, or Engineering, understanding of hardware design and verification, and knowledge of Verilog, VHDL, SystemVerilog, PSL, and Unix development environments.

Senior Verification Engineer to verify RTL implementing ARM SoC features, ensuring functionality meets architectural requirements. Collaborate with RTL team, develop verification environments, and mentor other engineers. Requires 5+ years of IP/SOC verification experience, proficiency in SystemVerilog, UVM Methodology, and SoC Verification using C Testcases. Experience with ARM-based designs and scripting languages is essential.

Senior engineer to verify Third-Party IPs (standard-cells, memories, interfaces) before embedding in Arm SoCs. Responsibilities include ensuring RTL design and EDA models align with Arm SoC design flow, verifying methodology, and analyzing deviations. Requires 5+ years experience in RTL, low-power verification, scripting, and System Verilog.

As a Product Owner, you will define and manage features development for Questel's Equinox IPMS suite, bridging business needs and technical solutions in an agile environment. You will gather stakeholder feedback, identify innovation opportunities, and write user stories and acceptance criteria. You will also validate deliverables, monitor product performance, and communicate product updates.

Senior SoC Architect to define and deliver system-level SoC platform architectures for Automotive, Edge, and Radar Processing. Requires 12+ years' experience architecting complex SoCs, expertise in automotive, PCIe, networking, or processor development, and strong system definition experience.

Senior Hardware Verification Engineer will define, implement, and execute verification strategies for Network-on-Chip (NoC) IP. Responsibilities include developing testbenches, collaborating with design teams, and maintaining verification flows. Requires 4+ years of experience, proficiency in VHDL, Verilog, SystemVerilog, C++, and Python, and strong understanding of hardware communication protocols.

Investigate performance issues and suggest product improvements for Cloud Server System-on-a-Chip components. Analyze the performance of Arm CPUs and Interconnect IPs.

Systems Engineer to contribute to E/E architecture development and engage with OEMs. Analyze architecture trade-offs, explore partitioning, and collaborate with engineering teams.

Experienced Product Marketing professional to develop security technology for NXP's microcontroller, applications processor, and networking controller portfolio. Drive security at the Edge for IoT/Industrial applications and support customers in meeting cybersecurity regulations. Collaborate with product managers, R&D, sales, and marketing to define security roadmaps and offerings.

Leads the execution of solution development for the NXP CoreRide platform, ensuring alignment with customer needs and business objectives. Defines the solution vision, coordinates development progress across Agile Release Trains (ARTs) and suppliers, and supports the solution throughout its lifecycle.

Technical expert in System/Hardware Safety for industrial projects (IEC61508). Defines safety architecture, conducts safety analysis, and contributes to certification. Drives innovation and promotes safety culture.

Client Advisor in Cannes will deliver the Valentino Couture Service, build strong client relationships, and achieve sales and CRM targets. The role requires exceptional customer service skills, a flexible schedule, and a team-oriented approach.

Manage and mentor a team of engineers, collaborating with Product to shape the strategic roadmap for Datadog's Kubernetes Autoscaling product. Lead design decisions, participate in on-call rotation, and contribute to code reviews.

Experienced live-in couple sought for private villa in Antibes. Responsibilities include driving, property maintenance, house cleaning, and wardrobe care. Must have similar experience and no bad habits.

Axelera AI seeks an experienced R&D engineer specializing in CPU architecture. Responsibilities include designing, analyzing, and evaluating microarchitectural components, building performance models, and developing architectural extensions for RISC-V. Candidates should have deep expertise in CPU design, PPA optimization, and ISA extensions.