116 English-speaking jobs in Cannes - Crasse

Senior Verification Engineer to verify RTL for ARM SoC features. Requires 3+ years in IP/SOC verification, proficiency in SystemVerilog/UVM, and experience with ARM designs.

Seeking an experienced Executive Assistant & Office Manager to support the CEO and leadership team in a fast-paced, international setting. Responsibilities include calendar management, travel coordination, and overseeing Sophia Antipolis office operations.

Senior Technical Consultant Analyst supports customers using Revenue Management and Dynamic Pricing solutions. Responsibilities include customer communication, business acumen development, and applying data science to optimize commercial opportunities.

Senior Technical Consultant Analyst supports Revenue Management and Dynamic Pricing for airlines and mobility providers. Responsibilities include customer communication, business acumen development, data science application, and business development. Requires a Master's degree and relevant industry experience.

Staff Hardware AI Engineer builds AI-enabled automation to improve hardware design and verification efficiency. Requires deep hardware knowledge, EDA tool experience, and AI tooling fluency for engineering automation.

Lead AI Safety definition and implementation for next-gen Automotive Compute Subsystems and SoCs for L4 autonomous driving. Develop safety architectures aligned with ISO 26262, SOTIF, and other standards.

Oversee end-to-end implementation of Intellectual Property Management Systems (IPMS). This role requires managing complex projects, developing plans, and coordinating with cross-functional teams while ensuring client satisfaction.

Senior FPGA Prototyping Engineer to design and improve the FPGA prototyping workflow for complex CPU designs. Responsibilities include generating, testing, and debugging platforms from RTL using state-of-the-art FPGAs.

Emulation Engineer role at SiPearl involves contributing to emulation setup, RTL adaptation, and pre-silicon verification. Key tasks include developing workflows, maintaining models, and supporting platform users. Requires 6+ years in digital ASIC and 4+ years on emulation platforms.

SiPearl is seeking passionate individuals to contribute to the development of Rhea, a European microprocessor for supercomputing and AI.

Senior Emulation Engineer/Team Lead to drive emulation strategy and workflows for complex CPUs. Lead the team, define project tasks, and optimize platform deliveries using ASIC and emulation platform expertise.

System Software Validation Engineer to ensure quality and reliability of software solutions. Design and execute test strategies, develop test cases, and verify firmware/software stacks. Requires 7+ years in software testing and strong technical knowledge.

Define, document, and drive system architecture for cutting-edge HPC systems. Lead architectural engagements with partners and customers to design optimized HPC nodes. Develop integration, performance measurement, and optimization tools. Contribute to collaborative projects, technical deliverables, and partner workshops. Support customers in migrating applications toward new system architectures.

Lead and develop the DFT team, ensuring successful project delivery and driving technical excellence in Design for Test methodologies.

Senior IP subsystem SoC architect will define, drive, and evolve IP, subsystem, and SoC architectures. Responsibilities include breaking down architectures into functional sub-blocks, writing specifications, and supporting RTL, physical design, verification, and software prototyping teams.

Experienced Project Engineer needed to manage complex Engineer-to-order projects in a marine environment. Own technical scope, lead discussions with shipyards and customers, and ensure successful project execution from handover to delivery.

Manages Talent Development activities across campuses, translating strategic directions into action plans and ensuring program consistency.

As a Physical Implementation Engineer, you will be responsible for ASIC physical implementation of eFPGA IP architectures from RTL to GDSII. You will contribute to the development and maintenance of the internal design flow.

Define and drive the architectural vision for the EMEA Train in a SAFe environment. Review complex technical designs, ensure alignment across distributed teams, and support platform evolution.

Senior Solution Development Engineer supports the Revenue Management Engineering team by driving roadmap execution, release planning, and process improvement. This role bridges engineering and stakeholders, focusing on operational excellence and AI adoption. Requires 7+ years in technical delivery.