94 English-speaking jobs in Cannes - Crasse
Analog Design Engineer - Technical Lead
- NXP Semiconductors
- valbonne
- July 13
Position Summary: The Senior Principal Analog Design Engineer / Technical Lead is responsible for leading the design, development, and validation of complex analog and mixed-signal integrated circuits. This role combines deep technical expertise with project leadership, ensuring the successful delivery of high-performance semiconductor products from concept through silicon qualification.
Precision Analog Data Converter Design
- NXP Semiconductors
- valbonne
- July 13
Architect and design next-generation data converter solutions including ADCs (SAR, Sigma-Delta DT/CT, Time-Interleaved) and DACs (current steering, charge redistribution, segmented architectures). Translate system requirements into detailed architecture and drive end-to-end design, validation, and optimization. Lead circuit design and analysis for critical blocks and provide technical leadership.
Administrative & Operations Assistant (English)
- Capitaegis Management
- Valbonne
- July 10
Administrative & Operations Assistant to support growing business operations. Responsibilities include streamlining workflows, managing accounts, coordinating projects, and providing executive support. Requires advanced tech literacy, strong problem-solving skills, and fluency in English.
Security SW Technical lead
- TrustAZUR S.A.S.
- valbonne
- July 9
We are seeking a Security SW Technical Lead and a Security SW Engineer with expertise in security, Trusted Execution Environments, and embedded systems. Both roles require extensive experience in embedded firmware, RTOS, and application development for secure embedded systems.
Functional Safety for AI- Technical Lead
- NXP Semiconductors
- valbonne
- July 7
Leads innovation projects for Safe AI, translating the Safety & AI roadmap into projects. Defines system safety concepts for AI-driven features and ensures fail-safe or fail-operational behavior. Manages the “Safety & AI” innovation team.
CoreRide Solution Manager (SAFe)
- NXP Semiconductors
- valbonne
- July 5
Leads the execution of solution development for the NXP CoreRide platform, ensuring alignment with customer needs and business objectives. Defines the solution vision, coordinates development progress across Agile Release Trains (ARTs) and suppliers, and supports the solution throughout its lifecycle.
Senior Site Reliability Engineer
- Mineo
- antibes
- July 5
Senior Site Reliability Engineer will manage global AWS services, participate in on-call rotations, and build CI/CD solutions. Requires experience with AWS, Kubernetes, Infrastructure-as-Code, Unix/Linux, and CI/CD tools.
Digital Design Engineer (Bluetooth)
- Hillcrest Labs, acquired by CEVA
- valbonne
- July 5
Digital Design Engineer to develop Bluetooth IP solutions. Define micro-architecture, implement designs, and support validation and customer support. Requires 3+ years of digital design experience, Verilog/SystemVerilog proficiency, and FPGA implementation skills.
Bluetooth IP Design Engineer (FPGA & SoC)
- Hillcrest Labs, acquired by CEVA
- valbonne
- July 5
Digital Design Engineer to join Bluetooth IP team developing state-of-the-art solutions. Define micro-architecture, implement designs, and support validation and customer support. Requires 3+ years of digital design and verification experience, strong Verilog/SystemVerilog skills, and FPGA implementation experience.
Cache Coherency Architect - SoC & NoC / Architect Cache Cohenrency F/H
- Arteris
- biot
- July 5
Define and optimize cache coherency solutions for Arteris' NoC IP portfolio. Collaborate with hardware designers, verification engineers, and software developers to create high-performance, power-efficient, and reliable NoC IP solutions. Analyze customer requirements for cache-coherent system architectures and set performance goals for configurable IP.
Bench Test Lead Engineer
- Cadence Design Systems, Inc.
- Valbonne
- July 3
ATE Test Engineer Junior
- Cadence Design Systems, Inc.
- Valbonne
- July 3
Post-Doctorant F/H Usability evaluation of “notice and action” reporting mechanisms in online platforms and its legal implications within the EU Digital Services Act (DSA)
- INRIA
- Biot
- July 1
Student Job Childcare (M/F)
- Momji
- St-Laurent-du-Var
- July 1
PhD Position F/M Multi-fidelity Bayesian Optimization in aerodynamics for large-scale computing infrastructures
- INRIA
- Biot
- July 1
Clinical Project Manager H/F
- Quantificare - Quartier Latin
- Biot
- June 30
Verification Engineer
- Codasip
- villeneuve loubet
- June 30
Verification Engineer needed to verify RISC-V processors and extensions. Develop verification solutions, collaborate with engineers, and define verification strategies. Requires experience with functional processor verification methodologies, CPU architectures, and languages like SystemVerilog, Python, C++, Rust, or Go.
Senior Marketer (Remote)
- Cintoo
- Biot
- June 29
Executive Administrative Assistant
- NXP Semiconductors
- valbonne
- June 26
Provides comprehensive administrative support to executives and teams within the STI organization. Manages complex schedules, coordinates activities, and ensures smooth day-to-day operations. Supports team events, onboarding, and cross-functional collaboration. Tracks action items, maintains documentation, and supports budget management. Communicates effectively with internal and external stakeholders. Proficient in Microsoft 365 and possesses strong organizational and communication skills.
Verification Engineer
- Atlas Metrics
- villeneuve loubet
- June 26
Verify RISC-V processors and extensions. Develop verification solutions including test benches, stimulus generation, and formal environments. Collaborate with engineers on verification activities from start to finish.



























































