169 English-speaking jobs in Cannes - Crasse

Graduate DevOps CPU Physical Implementation Engineer will automate, manage, and improve flow environments, dependencies, and continuous integration. Responsibilities include profiling resource usage, analyzing data, and contributing to improved CPU micro-architecture.

CPU Technology Architect needed to analyze benchmarks, collaborate with software teams, and drive technical activities related to next-generation Arm CPUs. Requires experience in software programming, technical management, and a passion for innovation.

Software engineers will develop software stacks for Arm's reference platforms and implement support for industry standards across open-source projects.

Leads micro-architecture and RTL implementation for SoC design, making independent design decisions and setting the technical bar for correctness, scalability, and robustness. Responsible for the micro-architecture and RTL design of a sophisticated digital subsystem or IP integration into SoC design.

Arm seeks a Principal SoC Architect to design and develop high-volume, sophisticated SoC platforms across multiple market segments. Responsibilities include collaborating with architecture, core technology, and software teams to optimize end-to-end platform solutions and participate in identifying key use cases showcasing Arm IP/platform. Requires significant experience architecting scalable SoCs on groundbreaking nodes and expertise in areas such as heterogeneous compute architectures, power management, and interconnect technologies. Excellent communication skills and the ability to influence at all levels are essential.

Leads micro-architecture and RTL implementation for SoC design, translating system requirements into scalable RTL micro architectures. Designs multi-clock and multi-power domain digital logic, including CDC architecture and partitioning. Mentors engineers on sophisticated digital design techniques and collaborates with verification, physical design, and validation teams. Requires expert-level SystemVerilog/Verilog and experience designing large, sophisticated RTL blocks.

Designs and scales evaluation systems to measure the performance and reliability of AI models. Builds human-in-the-loop and automated annotation pipelines for model assessment. Defines and implements continuous evaluation workflows to monitor model behavior. Collaborates cross-functionally to establish best practices for responsible AI.

Senior Software Engineer will architect and build systems for serving ML and LLM models across all data centers. Responsibilities include designing and optimizing Ray-based inference infrastructure, enabling self-service model deployment, and implementing A/B testing and shadow deployment capabilities.

Senior Software Engineer will solve scaling bottlenecks, deploy features, investigate production issues, and design scalable architectures. Requires significant experience in one or more languages, code simplicity and performance focus, and the ability to design high-scale solutions.

Experienced network security engineer to build, operate, and scale SASE architecture using Fortinet products and Linux (OpenStack). Responsibilities include network monitoring, automation, incident resolution, and documentation. Requires expertise in networking, network security, Linux administration, and strong troubleshooting skills.

Senior SoC Architect to drive the evolution of network-on-chip technology for autonomous driving, 5G mobiles, and AI. Experience in SoC/IP/NoC design, architecture specifications, and communication protocols (AMBA, PCIe, CXL, OCP) required.

Senior Verification Engineer to verify RTL implementing ARM SoC features, ensuring functionality meets architectural requirements. Collaborate with RTL team, develop verification environments, and implement verification strategies. Requires 5+ years of IP/SOC verification experience, proficiency in SystemVerilog, UVM Methodology, and SoC Verification using C Testcases. Experience with ARM-based designs and scripting languages is essential.

English-speaking nanny needed in EPINAY SUR SEINE for 4 hours per week. Duties include school pick-up, snack time, homework help, and playtime. Previous experience with children required. Must be a EU citizen or hold a visa to work in France.

Mômji seeks an English-speaking nanny in Épinay sur Seine for 4 hours per week to care for 1 child. Tasks include school pick-up, snack time, homework help, and playtime. Previous experience with children is required.

Software engineers will develop software stacks for Arm's reference platforms and implement support for industry standards across open-source projects.

Provides on-site technical services including design, deployment, testing, and optimization of Fortinet security infrastructure. Collaborates with customers and Fortinet peers to drive customer satisfaction. Requires 7+ years of experience in LAN/WAN/Network Security Products and experience with FortiGate solutions or major 3rd party security solutions.

Senior/Staff Software Engineer will develop python-based tools to automate design, verification, and documentation for next-generation Arm Products. Responsibilities include scaling solutions, employing algorithms to improve architecture, and documenting code. Extensive Python coding experience and knowledge of software development processes are required.

Field Application Engineer to support customers on technical aspects of innovative semiconductor technology. Requires Masters/PhD in Electrical Engineering, Electronics, Computer Science, 3+ years RTL coding experience (VHDL, Verilog, System Verilog), ASIC implementation knowledge, and strong customer facing skills. Global travel (25%-50%) is required.

Define and optimize cache coherency solutions for Arteris' NoC IP portfolio. Collaborate with hardware designers, verification engineers, and software developers to create high-performance, power-efficient, and reliable NoC IP. Analyze customer requirements for cache-coherent system architectures and set performance goals for configurable IP.

The AI&DSP Engineer will research, develop, and optimize AI and DSP based audio and speech processing algorithms for assistive hearing applications in smart eyewear.