94 English-speaking jobs in Cannes - Crasse

Position Summary: The Senior Principal Analog Design Engineer / Technical Lead is responsible for leading the design, development, and validation of complex analog and mixed-signal integrated circuits. This role combines deep technical expertise with project leadership, ensuring the successful delivery of high-performance semiconductor products from concept through silicon qualification.

Architect and design next-generation data converter solutions including ADCs (SAR, Sigma-Delta DT/CT, Time-Interleaved) and DACs (current steering, charge redistribution, segmented architectures). Translate system requirements into detailed architecture and drive end-to-end design, validation, and optimization. Lead circuit design and analysis for critical blocks and provide technical leadership.

Administrative & Operations Assistant to support growing business operations. Responsibilities include streamlining workflows, managing accounts, coordinating projects, and providing executive support. Requires advanced tech literacy, strong problem-solving skills, and fluency in English.

We are seeking a Security SW Technical Lead and a Security SW Engineer with expertise in security, Trusted Execution Environments, and embedded systems. Both roles require extensive experience in embedded firmware, RTOS, and application development for secure embedded systems.

Leads innovation projects for Safe AI, translating the Safety & AI roadmap into projects. Defines system safety concepts for AI-driven features and ensures fail-safe or fail-operational behavior. Manages the “Safety & AI” innovation team.

Leads the execution of solution development for the NXP CoreRide platform, ensuring alignment with customer needs and business objectives. Defines the solution vision, coordinates development progress across Agile Release Trains (ARTs) and suppliers, and supports the solution throughout its lifecycle.

Senior Site Reliability Engineer will manage global AWS services, participate in on-call rotations, and build CI/CD solutions. Requires experience with AWS, Kubernetes, Infrastructure-as-Code, Unix/Linux, and CI/CD tools.

Digital Design Engineer to develop Bluetooth IP solutions. Define micro-architecture, implement designs, and support validation and customer support. Requires 3+ years of digital design experience, Verilog/SystemVerilog proficiency, and FPGA implementation skills.

Digital Design Engineer to join Bluetooth IP team developing state-of-the-art solutions. Define micro-architecture, implement designs, and support validation and customer support. Requires 3+ years of digital design and verification experience, strong Verilog/SystemVerilog skills, and FPGA implementation experience.

Define and optimize cache coherency solutions for Arteris' NoC IP portfolio. Collaborate with hardware designers, verification engineers, and software developers to create high-performance, power-efficient, and reliable NoC IP solutions. Analyze customer requirements for cache-coherent system architectures and set performance goals for configurable IP.

Develop, execute, and maintain bench-level validation solutions for semiconductor devices and IP products. Design, automate, and maintain measurement setups using Python, LabVIEW, or similar tools. Perform electrical characterization and debug silicon issues. Collaborate with design, product, and ATE teams.

Develop, debug, and maintain ATE test programs for wafer sort and final test. Convert design test patterns into ATE-compatible formats and define test strategy, coverage, and limits. Analyze ATE data, debug failing devices, and contribute to test methodologies.

A postdoctoral position is available to evaluate the usability of "notice and action" reporting mechanisms on online platforms within the context of the EU Digital Services Act (DSA). The successful candidate will apply usability evaluation methods to assess the effectiveness and user-friendliness of these mechanisms.

Momji is seeking an English-speaking nanny for a part-time position in ST LAURENT DU VAR. The role involves after-school and daycare pick-ups, homework assistance, snack time, hygiene support, and park outings. Previous experience with children is required.

This PhD position focuses on extending Bayesian optimization methods to multi-fidelity optimization in large-scale computing infrastructures. The research will develop algorithms that leverage different levels of accuracy and computational cost in simulations to efficiently converge towards optimal solutions.

Clinical Project Manager will oversee clinical study projects, including technical, logistical, and interpersonal aspects. Responsibilities include interacting with international contacts, defining project requirements, drafting documents, conducting training, and monitoring budgets. Requires a Master's degree, project management experience in healthcare, and fluency in English.

Verification Engineer needed to verify RISC-V processors and extensions. Develop verification solutions, collaborate with engineers, and define verification strategies. Requires experience with functional processor verification methodologies, CPU architectures, and languages like SystemVerilog, Python, C++, Rust, or Go.

Shape and lead marketing strategy for priority segments and markets, including ABM motions. Define ICPs, account tiers, and target account lists. Plan integrated campaigns across paid, owned, and partner channels. Measure campaign performance, attribution, and progress. Collaborate with Sales, Product Marketing, Content, Events, and SalesOps.

Provides comprehensive administrative support to executives and teams within the STI organization. Manages complex schedules, coordinates activities, and ensures smooth day-to-day operations. Supports team events, onboarding, and cross-functional collaboration. Tracks action items, maintains documentation, and supports budget management. Communicates effectively with internal and external stakeholders. Proficient in Microsoft 365 and possesses strong organizational and communication skills.

Verify RISC-V processors and extensions. Develop verification solutions including test benches, stimulus generation, and formal environments. Collaborate with engineers on verification activities from start to finish.