121 English-speaking jobs in Cannes - Crasse

Senior Verification Engineer to verify RTL for ARM SoC features. Requires 3+ years in IP/SOC verification, proficiency in SystemVerilog/UVM, and experience with ARM designs.

Principal Engineer to act as technical lead, solving complex challenges in Availability Computation. Responsibilities include designing, managing, and optimizing cloud infrastructure while ensuring high-quality, efficient code and driving engineering process improvements.

Seeking an experienced Executive Assistant & Office Manager to support the CEO and leadership team in a fast-paced, international setting. Responsibilities include calendar management, travel coordination, and overseeing Sophia Antipolis office operations.

Senior Technical Consultant Analyst supports customers using Revenue Management and Dynamic Pricing solutions. Responsibilities include customer communication, business acumen development, and applying data science to optimize commercial opportunities.

Senior Technical Consultant Analyst supports Revenue Management and Dynamic Pricing for airlines and mobility providers. Responsibilities include customer communication, business acumen development, data science application, and business development. Requires a Master's degree and relevant industry experience.

Staff Hardware AI Engineer builds AI-enabled automation to improve hardware design and verification efficiency. Requires deep hardware knowledge, EDA tool experience, and AI tooling fluency for engineering automation.

Director of Product Marketing to drive market success and revenue for NFC IoT Security products. This role owns the full product lifecycle, from market definition to commercial success, requiring 10+ years in semiconductor product marketing.

Job DescriptionLead the definition and implementation of AI Safety for next-generation Automotive Compute Subsystems and complex SoCs enabling L4 autonomous driving and humanoid robotics. As the technical lead for AI Safety, you will create comprehensive safety architectures covering hardware, software, AI frameworks, and tool flows, ensuring credible AI deployment for safety-critical systems.

Oversee end-to-end implementation of Intellectual Property Management Systems (IPMS). This role requires managing complex projects, developing plans, and coordinating with cross-functional teams while ensuring client satisfaction.

Experienced Project Engineer needed to manage complex Engineer-to-order projects in a marine environment. Own technical scope, lead discussions with shipyards and customers, and ensure successful project execution from handover to delivery.

Senior FPGA Prototyping Engineer to design and improve the FPGA prototyping workflow for complex CPU designs. Responsibilities include generating, testing, and debugging platforms from RTL using state-of-the-art FPGAs.

Define, document, and drive system architecture for cutting-edge HPC systems. Lead architectural engagements with partners and customers to design optimized HPC nodes. Develop integration, performance measurement, and optimization tools. Contribute to collaborative projects, technical deliverables, and partner workshops. Support customers in migrating applications toward new system architectures.

Senior CAD flow engineer will define, deploy, and improve ASIC development methodology and design flow. Responsibilities include leading tool evaluation and optimization, providing technical support to development teams, and acting as a technical interface with vendors.

System Software Validation Engineer to ensure quality and reliability of software solutions. Design and execute test strategies, develop test cases, and verify firmware/software stacks. Requires 7+ years in software testing and strong technical knowledge.

Emulation Engineer role at SiPearl involves contributing to emulation setup, RTL adaptation, and pre-silicon verification. Key tasks include developing workflows, maintaining models, and supporting platform users. Requires 6+ years in digital ASIC and 4+ years on emulation platforms.

Senior IP subsystem SoC architect will define, drive, and evolve IP, subsystem, and SoC architectures. Responsibilities include breaking down architectures into functional sub-blocks, writing specifications, and supporting RTL, physical design, verification, and software prototyping teams.

Senior Emulation Engineer/Team Lead to drive emulation strategy and workflows for complex CPUs. Lead the team, define project tasks, and optimize platform deliveries using ASIC and emulation platform expertise.

SiPearl is seeking passionate individuals to contribute to the development of Rhea, a European microprocessor for supercomputing and AI.

Manages Talent Development activities across campuses, translating strategic directions into action plans and ensuring program consistency.

As a Physical Implementation Engineer, you will be responsible for ASIC physical implementation of eFPGA IP architectures from RTL to GDSII. You will contribute to the development and maintenance of the internal design flow.