88 English-speaking jobs in Cannes - Crasse

Lead and mentor a team to deliver a cutting-edge enterprise platform using Kotlin or Java and the Spring ecosystem. Design, develop, and maintain scalable backend services, utilizing GCP and microservices.

Digital Design Engineer to develop Bluetooth IP solutions. Define micro-architecture, implement designs, and support validation and customer support. Requires 3+ years of digital design experience, Verilog/SystemVerilog proficiency, and FPGA implementation skills.

Digital Design Engineer to join Bluetooth IP team developing state-of-the-art solutions. Define micro-architecture, implement designs, and support validation and customer support. Requires 3+ years of digital design and verification experience, strong Verilog/SystemVerilog skills, and FPGA implementation experience.

Senior Fullstack Developer builds end-to-end SaaS products using Next.js, React, and TypeScript. Integrates AI APIs and manages multiple projects. Requires 3+ years of experience and strong communication skills.

Provides high-level administrative and operational support to executives in a fast-paced international environment. Manages complex calendars, travel arrangements, and communications. Prepares executive-level documents and supports strategic initiatives.

Shape next-gen NFC wallet, eSE, and eUICC solutions. Define product requirements, contribute to roadmaps, and bridge technical needs with customer value across mobile and IoT ecosystems.

Observability Engineer to analyze, migrate, and design Dynatrace Synthetic Monitoring probes. Experience with Dynatrace Synthetic Monitoring and observability practices required.

Senior Hardware & Verification Engineer to lead and manage verification flows for complex hardware IP. Solid experience in RTL design and UVM-based verification required. Proficiency in Verilog/SystemVerilog/VHDL and EDA tools.

Embedded Software Engineer will design, develop, and debug C/C++ software for embedded systems in real-time environments. Collaborate with multidisciplinary teams to integrate and validate software solutions.

DevOps Engineer to design, improve, and implement automated services for application deployment and management. Responsibilities include automating tasks, collaborating with teams, managing incidents, and participating in key processes. Requires expertise in Linux, Docker, Kubernetes, scripting, CI/CD tools, infrastructure as code, monitoring, and databases.

This hybrid role combines hands-on technical management of the Sophia Antipolis site with contributions to EMEA technical standards and practices. Responsibilities include managing building systems, vendor relationships, and supporting workplace operations.

Leads the execution of solution development for the NXP CoreRide platform, ensuring alignment with customer needs and business objectives. Defines the solution vision, coordinates development progress across Agile Release Trains (ARTs) and suppliers, and supports the solution throughout its lifecycle.

Develops industrial test solutions (hardware and software) for mass production of automotive radar products. Collaborates with design teams and drives deliverables to completion. Requires 10+ years of Analog, RF/mmW test development experience using ATE systems.

FPGA Platform Lead for Secure Transactions & Interfaces (STI) team. Develops FPGA verification platforms, interfaces with design and software teams, defines FPGA strategy, and debugs designs. Requires 7+ years of experience in FPGA design flow, SoC architecture, and EDA tools.

Leads innovation projects for Safe AI, translating the Safety & AI roadmap into projects. Defines system safety concepts for AI-driven features and ensures fail-safe or fail-operational behavior. Manages the “Safety & AI” innovation team.

Investigate performance issues and suggest product improvements for Arm's Cloud Server System-on-a-Chip. Analyze the performance of Arm CPUs and Interconnect IPs.

Lead AI Safety definition and implementation for next-gen Automotive Compute Subsystems and complex SoCs for L4 autonomous driving and robotics. Develop safety architectures aligned with ISO 26262, SOTIF, and other standards.

Senior Verification Engineer to verify RTL for ARM SoC features. Requires 5+ years in IP/SOC verification, proficiency in SystemVerilog/UVM, and experience with ARM designs.

Senior Verification Engineer to verify RTL for ARM SoC features. Requires 3+ years in IP/SOC verification, proficiency in SystemVerilog/UVM, and experience with ARM designs.

Lead the architecture and design of next-generation coherent and non-coherent interconnect solutions for advanced SoCs. Requires 15+ years in SoC architecture with deep expertise in scalable interconnect fabrics and system-level optimization.