95 English-speaking jobs in Cannes - Crasse

Senior Hardware AI Engineer to build AI-enabled automation improving hardware design and verification efficiency. Develop AI solutions using OpenAI Codex and integrate AI tools to transform engineering workflows.

Senior Solution Development Engineer supports the Revenue Management Engineering team by driving roadmap execution, release planning, and process improvement. This role bridges engineering and product stakeholders, focusing on operational excellence and AI adoption.

Junior DFT Engineer role developing high-performance Automotive and Industrial SoCs. Responsibilities include DFT solution integration, RTL development, and validating manufacturing test solutions like Scan and ATPG. Requires a Master's degree and English fluency.

Lead the design, development, and validation of complex analog and mixed-signal ICs. This role requires deep technical expertise, strong leadership, and experience in CMOS analog circuit design and silicon delivery.

Shape next-gen NFC wallet, eSE, and eUICC solutions. Define product requirements, contribute to roadmaps, and bridge technical/customer needs across silicon, security, and mobile ecosystems.

Guides customers through post-sale onboarding and adoption of Fortinet technology, ensuring maximum value and a positive experience. Develops and maintains customer relationships, tracks service delivery, and identifies areas for improvement. Acts as the customer's advocate within Fortinet, collaborating with cross-functional teams to drive successful outcomes. Requires experience in service management, customer success, and FortiSASE technology.

Develop and maintain C++ back-end components for airline solutions, focusing on performance and scalability. Contribute to system architecture design within an Agile framework.

Define and drive the architectural vision for the EMEA Train, ensuring scalable and resilient solutions within a SAFe environment. Review complex technical designs across distributed teams and align architecture with standards.

Develop and maintain C++ back-end components for airline solutions, focusing on performance and scalability. Contribute to system architecture design within an Agile framework. Requires C++ experience and understanding of scalable architectures.

Audio Algorithm Engineer to join the Voice & Audio team, developing state-of-the-art speech enhancement algorithms for wearables. Responsibilities include designing real-time noise reduction and dereverberation algorithms, and training deep learning models. Requires a Master's or PhD in signal processing/ML.

Define and optimize cache coherency solutions within advanced IP portfolios. Develop cutting-edge cache coherent interconnect IP and ensure seamless integration with NoC interconnect and system IP.

Consulting Systems Engineer relays Public Cloud expertise to sales teams, customers, and partners. Responsibilities include conducting PoVs, researching integrations, and supporting field engineers. Requires pre-sales experience with AWS, Azure, or GCP.

Fortinet seeks an experienced Senior Full-Stack Developer to design and deliver application modules for network security infrastructure. Requires 5+ years in full-stack development, proficiency in JavaScript, Python, and RESTful APIs.

Consulting Systems Engineer provides Public Cloud expertise to sales teams, customers, and partners. Conducts PoVs, researches integrations with Fortinet's cybersecurity offerings, and supports sales activities. Requires experience with public cloud platforms (AWS, Azure, GCP), cloud security, and presentation skills.

The Channel Operations Manager leads the EMEA Channel Operations team, ensuring consistent business processes and improving channel support. Responsibilities include managing workflows, tracking incentives, and analyzing channel requests. Requires 5+ years in channel/sales operations within cybersecurity or IT.

Lead security evaluations and certification programs for Arm products, coordinating with external labs. Ensure compliance with standards like Common Criteria, FIPS, and ISO 21434. Requires 10+ years in product security.

Define and optimize cache coherency solutions within advanced IP portfolios. Develop cutting-edge cache coherent interconnect IP and ensure seamless integration with NoC and system IP.

Provides high-level administrative and operational support to executives in a fast-paced international environment. Manages complex calendars, travel arrangements, and communications. Prepares executive-level documents and supports strategic initiatives.

Observability Engineer to analyze, migrate, and design Dynatrace Synthetic Monitoring probes. Experience with Dynatrace Synthetic Monitoring and observability practices required.

Senior Hardware & Verification Engineer to lead and manage verification flows for complex hardware IP. Solid experience in RTL design and UVM-based verification required. Proficiency in Verilog/SystemVerilog/VHDL and EDA tools.