106 English-speaking jobs in Cannes - Crasse

Develop, debug, and maintain ATE test programs for semiconductor devices. This role involves creating test patterns, performing silicon bring-up, and analyzing ATE data. Requires a Master's degree and programming skills in languages like C, C++, Python, or Java.

Seeking an experienced Executive Assistant & Office Manager to support the CEO and leadership team. Responsibilities include managing complex calendars, coordinating travel, and overseeing daily office operations. Requires 8+ years of executive support experience.

Senior Technical Consultant Analyst supports customers using Revenue Management and Dynamic Pricing solutions. Responsibilities include customer communication, business acumen development, and applying data science to optimize commercial opportunities.

Senior Technical Consultant Analyst supports Revenue Management and Dynamic Pricing for airlines and mobility providers. Responsibilities include customer communication, business acumen, data science application, and business development. Requires a Master's degree and relevant industry experience.

Experienced Director of Product Marketing needed to drive market success for NFC IoT Security products. This role owns the full product lifecycle, from GTM strategy and positioning to market launch, collaborating with global teams. Requires 10+ years in semiconductor product marketing.

Oversee end-to-end IPMS implementation projects, ensuring delivery within scope, time, and budget. Requires 10+ years in project management, strong communication, and technical proficiency.

Lead and develop the DFT team, ensuring successful project delivery and driving technical excellence in Design for Test methodologies.

System Software Validation Engineer to ensure quality and reliability of software solutions. Design and execute test strategies, develop test cases, and verify firmware/software stacks. Requires 7+ years in software testing and strong technical knowledge.

Senior FPGA Prototyping Engineer to design and improve the FPGA prototyping workflow for complex CPU designs. Responsibilities include generating, testing, and debugging platforms from RTL using state-of-the-art FPGAs.

SiPearl is seeking passionate individuals to contribute to the development of Rhea, a European microprocessor for supercomputing and AI.

Senior CAD flow engineer will define, deploy, and improve ASIC development methodology and design flow. Responsibilities include leading tool evaluation and optimization, providing technical support to development teams, and acting as a technical interface with vendors.

Emulation Engineer role at SiPearl involves contributing to emulation setup, RTL adaptation, and pre-silicon verification. Key tasks include developing workflows, maintaining models, and supporting platform users. Requires 6+ years in digital ASIC and 4+ years on emulation platforms.

Senior IP subsystem SoC architect will define, drive, and evolve IP, subsystem, and SoC architectures. Responsibilities include breaking down architectures into functional sub-blocks, writing specifications, and supporting RTL, physical design, verification, and software prototyping teams.

Define, document, and drive system architecture for cutting-edge HPC systems. Lead architectural engagements with partners and customers to design optimized HPC nodes. Develop integration, performance measurement, and optimization tools. Contribute to collaborative projects, technical deliverables, and partner workshops. Support customers in migrating applications toward new system architectures.

Manages Talent Development activities across campuses, translating strategic directions into action plans and ensuring program consistency.

Software Engineer to develop and optimize EDA software for eFPGA and ASIC design. Responsibilities include implementing GUI interfaces, working on synthesis, placement, routing, and STA algorithms, and collaborating with hardware and software engineers.

As a Physical Implementation Engineer, you will be responsible for ASIC physical implementation of eFPGA IP architectures from RTL to GDSII. You will contribute to the development and maintenance of the internal design flow.

Experienced Backend Engineer joins an agile scrum team to deliver user stories. Responsibilities include system design, coding in C++ or Java, database modeling, and software testing. Requires English proficiency.

EMEA Payroll Specialist manages regional payroll for 27 countries and 3500+ people. Responsibilities include processing complex items like RSUs, ensuring compliance, and managing third-party providers.

Senior Hardware AI Engineer to build AI-enabled automation improving hardware design and verification efficiency. Develop AI solutions using OpenAI Codex and integrate AI tools to transform engineering workflows.