94 English-speaking jobs in Cannes - Crasse

Develop, debug, and maintain ATE test programs for semiconductor devices. This role involves creating test patterns, performing silicon bring-up, and analyzing ATE data. Requires a Master's degree and programming skills in languages like C, C++, Python, or Java.

Seeking an experienced Executive Assistant & Office Manager to support the CEO and leadership team. Responsibilities include managing complex calendars, coordinating travel, and overseeing daily office operations. Requires 8+ years of executive support experience.

Senior Technical Consultant Analyst supports customers using Revenue Management and Dynamic Pricing solutions. Responsibilities include customer communication, business acumen development, and applying data science to optimize commercial opportunities.

Senior Technical Consultant Analyst supports Revenue Management and Dynamic Pricing for airlines and mobility providers. Responsibilities include customer communication, business acumen, data science application, and business development. Requires a Master's degree and relevant industry experience.

Experienced Director of Product Marketing needed to drive market success for NFC IoT Security products. This role owns the full product lifecycle, from GTM strategy and positioning to market launch, collaborating with global teams. Requires 10+ years in semiconductor product marketing.

Oversee end-to-end IPMS implementation projects, ensuring delivery within scope, time, and budget. Requires 10+ years in project management, strong communication, and technical proficiency.

Senior FPGA Prototyping Engineer to design and improve the FPGA prototyping workflow for complex CPU designs. Responsibilities include generating, testing, and debugging platforms from RTL using state-of-the-art FPGAs.

Emulation Engineer role at SiPearl involves contributing to emulation setup, RTL adaptation, and pre-silicon verification. Key tasks include developing workflows, maintaining models, and supporting platform users. Requires 6+ years in digital ASIC and 4+ years on emulation platforms.

Manages Talent Development activities across campuses, translating strategic directions into action plans and ensuring program consistency.

Software Engineer to develop and optimize EDA software for eFPGA and ASIC design. Responsibilities include implementing GUI interfaces, working on synthesis, placement, routing, and STA algorithms, and collaborating with hardware and software engineers.

As a Physical Implementation Engineer, you will be responsible for ASIC physical implementation of eFPGA IP architectures from RTL to GDSII. You will contribute to the development and maintenance of the internal design flow.

Experienced Backend Engineer joins an agile scrum team to deliver user stories. Responsibilities include system design, coding in C++ or Java, database modeling, and software testing. Requires English proficiency.

EMEA Payroll Specialist manages regional payroll for 27 countries and 3500+ people. Responsibilities include processing complex items like RSUs, ensuring compliance, and managing third-party providers.

Senior Hardware AI Engineer to build AI-enabled automation improving hardware design and verification efficiency. Develop AI solutions using OpenAI Codex and integrate AI tools to transform engineering workflows.

Senior Solution Development Engineer supports the Revenue Management Engineering team by driving roadmap execution, release planning, and process improvement. This role bridges engineering and stakeholders, focusing on operational excellence and AI adoption.

Principal Design Verification Engineer to design and deliver interconnect & memory hierarchy solutions for sophisticated SoCs. Responsibilities include UVM test bench development, RTL verification, and improving verification processes using scripting and automation.

Junior DFT Engineer role developing high-performance Automotive and Industrial SoCs. Responsibilities include DFT solution integration, RTL development, and validating manufacturing test solutions like Scan and ATPG. Requires a Master's degree and English fluency.

Lead the design, development, and validation of complex analog and mixed-signal ICs. This role requires deep technical expertise, strong leadership, and experience in CMOS analog circuit design and silicon delivery.

Senior Digital Design Engineer to join Bluetooth IP team. Responsible for macro/sub-system architecture, design, and verification of Bluetooth/15.4 MAC, PHY, and platform solutions. Requires 12+ years of digital design experience, 5+ years in architecture, and proficiency in Verilog/SystemVerilog. Must have a strong understanding of SoC and HW sub-systems architecture and the full design flow.

Lead security evaluations and certification programs for Arm products, coordinating with external labs. Ensure compliance with standards like Common Criteria, FIPS, and ISO 21434. Requires 10+ years in product security.