116 English-speaking jobs in Cannes - Crasse

Senior Emulation Engineer/Team Lead to drive emulation strategy and workflows for complex CPUs. Lead the team, define project tasks, and optimize platform deliveries using ASIC and emulation platform expertise.

Senior IP subsystem SoC architect will define, drive, and evolve IP, subsystem, and SoC architectures. Responsibilities include breaking down architectures into functional sub-blocks, writing specifications, and supporting RTL, physical design, verification, and software prototyping teams.

Emulation Engineer role at SiPearl involves contributing to emulation setup, RTL adaptation, and pre-silicon verification. Key tasks include developing workflows, maintaining models, and supporting platform users. Requires 6+ years in digital ASIC and 4+ years on emulation platforms.

Lead and develop the DFT team, ensuring successful project delivery and driving technical excellence in Design for Test methodologies.

Senior FPGA Prototyping Engineer to design and improve the FPGA prototyping workflow for complex CPU designs. Responsibilities include generating, testing, and debugging platforms from RTL using state-of-the-art FPGAs.

System Software Validation Engineer to ensure quality and reliability of software solutions. Design and execute test strategies, develop test cases, and verify firmware/software stacks. Requires 7+ years in software testing and strong technical knowledge.

Experienced Project Engineer needed to manage complex Engineer-to-order projects in a marine environment. Own technical scope, lead discussions with shipyards and customers, and ensure successful project execution from handover to delivery.

Software Engineer to develop and optimize EDA software for eFPGA and ASIC design. Responsibilities include implementing GUI interfaces, working on synthesis, placement, routing, and STA algorithms, and collaborating with hardware and software engineers.

As a Physical Implementation Engineer, you will be responsible for ASIC physical implementation of eFPGA IP architectures from RTL to GDSII. You will contribute to the development and maintenance of the internal design flow.

Experienced Backend Engineer joins an agile scrum team to deliver user stories. Responsibilities include system design, coding in C++ or Java, database modeling, and software testing. Requires English proficiency.

The Recruitment Administrator supports the recruitment team by managing reception, screening applications, maintaining the database, and assisting with job postings and candidate support.

EMEA Payroll Specialist manages regional payroll for 27 countries and 3500+ people. Responsibilities include processing complex items like RSUs, ensuring compliance, and managing third-party providers.

Senior Hardware AI Engineer to build AI-enabled automation improving hardware design and verification efficiency. Develop AI solutions using OpenAI Codex and integrate AI tools to transform engineering workflows.

Senior Satellite Systems Engineer provides resident systems engineering support across satellite procurement phases, including design, integration, and launch. Responsibilities involve reviewing test data and ensuring platform equipment meets performance requirements.

Senior Solution Development Engineer supports the Revenue Management Engineering team by driving roadmap execution, release planning, and process improvement. This role bridges engineering and stakeholders, focusing on operational excellence and AI adoption.

Principal Design Verification Engineer to design and deliver interconnect & memory hierarchy solutions for sophisticated SoCs. Responsibilities include UVM test bench development, RTL verification, and improving verification processes using scripting and automation.

Wi-Fi Validation Team Leader owns end-to-end validation of cutting-edge Wi-Fi IPs. This role leads system-level validation, ensuring quality meets Wi-Fi Alliance standards. Requires experience in IP validation, Python, Linux, and technical leadership.

Principal Design Verification Engineer to design and deliver interconnect & memory hierarchy solutions for sophisticated SoCs. Responsibilities include UVM test bench development, RTL verification, and improving verification processes using scripting languages and Arm AMBA protocols.

Lead security evaluations and certification programs for Arm products by coordinating with external security laboratories. Ensure compliance with standards like Common Criteria, FIPS, and ISO 21434. Requires 10+ years in product security.

This hybrid role requires hands-on technical ownership of building systems at the Sophia Antipolis site while standardizing maintenance and technical practices across EMEA. Key duties include operations, vendor management, and process improvement.