99 English-speaking jobs in Cannes - Crasse

  • Hillcrest Labs, acquired by CEVA
  • valbonne
  • September 1
Senior Digital Design Engineer to join Bluetooth IP team. Responsible for macro/sub-system architecture, design, and verification of Bluetooth/15.4 MAC, PHY, and platform solutions. Requires 12+ years of digital design experience, 5+ years in architecture, and proficiency in Verilog/SystemVerilog. Must have a strong understanding of SoC and HW sub-systems architecture and the full design flow.
  • Questel
  • valbonne
  • September 1
Oversee end-to-end implementation of Intellectual Property Management Systems. Requires 10+ years in software project management, strong communication, and technical understanding.
  • Arteris
  • biot
  • September 1
Principal Design Verification Engineer to design and deliver interconnect & memory hierarchy solutions for sophisticated SoCs. Responsibilities include UVM test bench development, RTL verification, and improving verification processes using scripting. Requires strong RTL (Verilog) and UVM skills.
  • SiPearl
  • Valbonne
  • August 20
  • visa sponsorship
LogoSenior IP subsystem SoC architect will define, drive, and evolve IP, subsystem, and SoC architectures. Responsibilities include breaking down architectures into functional sub-blocks, writing specifications, and supporting RTL, physical design, verification, and software prototyping teams.
  • SiPearl
  • Valbonne
  • August 20
  • visa sponsorship
LogoSenior CAD flow engineer will define, deploy, and improve ASIC development methodology and design flow. Responsibilities include leading tool evaluation and optimization, providing technical support to development teams, and acting as a technical interface with vendors.
  • SiPearl
  • Valbonne
  • August 20
LogoSiPearl is seeking passionate individuals to contribute to the development of Rhea, a European microprocessor for supercomputing and AI.
  • SiPearl
  • Valbonne
  • August 20
  • visa sponsorship
LogoSenior FPGA Prototyping Engineer to design and improve the FPGA prototyping workflow for complex CPU designs. Responsibilities include generating, testing, and debugging platforms from RTL using state-of-the-art FPGAs.
  • SiPearl
  • Valbonne
  • August 20
  • visa sponsorship
LogoEmulation Engineer role at SiPearl involves contributing to emulation setup, RTL adaptation, and pre-silicon verification. Key tasks include developing workflows, maintaining models, and supporting platform users. Requires 6+ years in digital ASIC and 4+ years on emulation platforms.
  • Evac Group
  • Antibes
  • August 20
LogoLeads growth of the retrofit business by developing and executing go-to-market strategies and value propositions. Manages complex sales cycles, negotiates deals, and builds client relationships. Drives sustainable growth through pipeline development, customer engagement, and strategic account management.
  • Evac Group
  • Antibes
  • August 20
LogoExperienced Project Engineer needed to manage complex Engineer-to-order projects in a marine environment. Own technical scope, lead discussions with shipyards and customers, and ensure successful project execution from handover to delivery.
  • IC Resources
  • antibes
  • August 18
Embedded Software Engineers develop next generation Wi-Fi technologies using low-level C for wireless communications and subsystems.
  • Arm
  • valbonne
  • August 10
This role combines hands-on technical ownership of building systems (HVAC, electrical, BMS) at the Sophia Antipolis site with EMEA technical contribution. Responsibilities include site operations, vendor management, and standardizing maintenance practices across multiple locations.
  • ETSI
  • valbonne
  • August 3
Technical Expert provides technical expertise and project management to ETSI Software Development Groups. Responsibilities include supporting software development, managing infrastructure, organizing meetings, and fostering collaboration. Requires a Master's degree in engineering or computer science, experience in open-source projects and/or standardization groups, and strong communication skills.
  • Arm
  • valbonne
  • July 27
Senior Verification Engineer to verify RTL for ARM SoC features. Requires 5+ years in IP/SOC verification, proficiency in SystemVerilog/UVM, and experience with ARM designs.
  • Arm
  • valbonne
  • July 25
Lead the architecture and design of next-generation coherent and non-coherent interconnect solutions for advanced SoCs. Requires 15+ years in SoC architecture with deep expertise in scalable interconnect fabrics and system-level optimization.
  • Arteris
  • biot
  • July 22
Define and optimize cache coherency solutions for Arteris' NoC IP portfolio. Collaborate with hardware designers, verification engineers, and software developers to create high-performance, power-efficient, and reliable NoC IP solutions. Analyze customer requirements for cache-coherent system architectures and set performance goals for configurable IP.
  • Jobtailor
  • valbonne
  • July 21
Observability Engineer to analyze, migrate, and design Dynatrace Synthetic Monitoring probes. Experience with Dynatrace Synthetic Monitoring and observability practices required.
  • Jobtailor
  • biot
  • July 14
Project Manager for Space Systems Embedded Software. Own the full V-model lifecycle, leading embedded software activities. Ensure reliable execution by reviewing interfaces and controlling quality using metrics. Requires experience in embedded software on RTOS and software engineering processes.
  • Jobtailor
  • cagnes sur mer
  • July 10
  • no experience
Become the ALB representative for your territory, identifying and managing properties like apartments and villas. Manage your portfolio, including owner and guest relations, while working autonomously. Persuasive ability is key.
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