105 English-speaking jobs in Cannes - Crasse

FPGA Platform Lead for Secure Transactions & Interfaces (STI) team. Develops FPGA verification platforms, interfaces with design and software teams, defines FPGA strategy, and debugs designs. Requires 7+ years of experience in FPGA design flow, SoC architecture, and EDA tools.

Lead AI Safety definition and implementation for next-gen Automotive Compute Subsystems and complex SoCs for L4 autonomous driving and robotics. Develop safety architectures aligned with ISO 26262, SOTIF, and other standards.

Beginner-friendly opportunity to earn daily by turning free traffic into income using the MyLeadBiz system. Requires 5-10 hours weekly and a passion for the internet.

Develop and maintain ATE test programs for semiconductor devices. This role involves validating and optimizing Automated Test Equipment solutions across the product lifecycle. Requires a Master's degree and programming skills in languages like C, C++, Python, or Java.

Seeking an experienced Executive Assistant & Office Manager to support the CEO and leadership team. Responsibilities include managing complex calendars, coordinating travel, and overseeing daily office operations. Requires 8+ years of executive support experience.

Director of Product Marketing to drive market success for NFC IoT Security products. This role owns the full product lifecycle, from market definition to commercial success, requiring 10+ years in semiconductor product marketing.

Senior IP subsystem SoC architect will define, drive, and evolve IP, subsystem, and SoC architectures. Responsibilities include breaking down architectures into functional sub-blocks, writing specifications, and supporting RTL, physical design, verification, and software prototyping teams.

Senior CAD flow engineer will define, deploy, and improve ASIC development methodology and design flow. Responsibilities include leading tool evaluation and optimization, providing technical support to development teams, and acting as a technical interface with vendors.

SiPearl is seeking passionate individuals to contribute to the development of Rhea, a European microprocessor for supercomputing and AI.

Senior Emulation Engineer/Team Lead to drive emulation strategy and workflows for complex CPUs. Lead the team, define project tasks, and optimize platform deliveries using ASIC and emulation platform expertise.

Define, document, and drive system architecture for cutting-edge HPC systems. Lead architectural engagements with partners and customers to design optimized HPC nodes. Develop integration, performance measurement, and optimization tools. Contribute to collaborative projects, technical deliverables, and partner workshops. Support customers in migrating applications toward new system architectures.

System Software Validation Engineer to ensure quality and reliability of software solutions. Design and execute test strategies, develop test cases, and verify firmware/software stacks. Requires 7+ years in software testing and strong technical knowledge.

Senior FPGA Prototyping Engineer to design and improve the FPGA prototyping workflow for complex CPU designs. Responsibilities include generating, testing, and debugging platforms from RTL using state-of-the-art FPGAs.

Emulation Engineer role at SiPearl involves contributing to emulation setup, RTL adaptation, and pre-silicon verification. Key tasks include developing workflows, maintaining models, and supporting platform users. Requires 6+ years in digital ASIC and 4+ years on emulation platforms.

Leads growth of the retrofit business by developing and executing go-to-market strategies and value propositions. Manages complex sales cycles, negotiates deals, and builds client relationships. Drives sustainable growth through pipeline development, customer engagement, and strategic account management.

Experienced Project Engineer needed to manage complex Engineer-to-order projects in a marine environment. Own technical scope, lead discussions with shipyards and customers, and ensure successful project execution from handover to delivery.

Principal Design Verification Engineer to design and deliver interconnect & memory hierarchy solutions for sophisticated SoCs. Responsibilities include UVM test bench development, RTL verification, and improving verification processes using scripting.

Lead security evaluations and certification programs for Arm products, coordinating with external labs. Ensure compliance with standards like Common Criteria, FIPS, and ISO 21434. Requires 10+ years in product security.

This hybrid role requires hands-on technical ownership of building systems at the Sophia Antipolis site while standardizing maintenance and technical practices across EMEA. Responsibilities include site operations, vendor management, and process improvement.

Fortinet seeks an experienced Senior Full-Stack Developer to design and deliver application modules for network security infrastructure. Requires 5+ years in full-stack development, proficiency in JavaScript, Python, and RESTful APIs.