106 English-speaking jobs in Cannes - Crasse

TMC France seeks a Business Manager to drive business development and client relationships in the PACA region. The role involves recruiting consultants, identifying client needs, and ensuring operational excellence for projects.

As a Team Manager, you will lead, train, and coach a team to achieve sales goals and deliver exceptional client experiences. You will be responsible for team development, performance management, client-centric training, and fostering a positive work environment.

As a Physical Implementation Engineer, you will be responsible for ASIC physical implementation of eFPGA IP architectures from RTL to GDSII. You will contribute to the development and maintenance of the internal design flow.

Designs, implements, and debugs FPGA-based functionality for mixed-signal systems using RTL development, simulation, and hardware validation. Supports development activities on Xilinx Zynq-based platforms, including logic integration, interface definition, and hardware/software interaction.

Develops industrial test solutions (hardware and software) for mass production of automotive radar products. Collaborates with design teams and drives deliverables to completion. Requires 10+ years of Analog, RF/mmW test development experience using ATE systems.

Leads innovation projects for Safe AI, translating the Safety & AI roadmap into projects. Defines system safety concepts for AI-driven features and ensures fail-safe or fail-operational behavior. Manages the “Safety & AI” innovation team.

Senior Satellite Systems Engineer provides resident systems engineering support across satellite procurement phases, including design, integration, and launch. Responsibilities involve reviewing test data and ensuring platform equipment meets performance requirements.

Senior Digital Design Engineer to join Bluetooth IP team. Responsible for macro/sub-system architecture, design, and verification of Bluetooth/15.4 MAC, PHY, and platform solutions. Requires 12+ years of digital design experience, 5+ years in architecture, and proficiency in Verilog/SystemVerilog. Must have a strong understanding of SoC and HW sub-systems architecture and the full design flow.

Oversee end-to-end implementation of Intellectual Property Management Systems. Requires 10+ years in software project management, strong communication, and technical understanding.

Principal Design Verification Engineer to design and deliver interconnect & memory hierarchy solutions for sophisticated SoCs. Responsibilities include UVM test bench development, RTL verification, and improving verification processes using scripting. Requires strong RTL (Verilog) and UVM skills.

FP&A Analyst role involving business reviews, group reporting, and budget/reforecast building. Requires 3+ years' experience, advanced accounting/Excel skills, and a rigorous, proactive approach.

Senior CAD flow engineer will define, deploy, and improve ASIC development methodology and design flow. Responsibilities include leading tool evaluation and optimization, providing technical support to development teams, and acting as a technical interface with vendors.

Senior IP subsystem SoC architect will define, drive, and evolve IP, subsystem, and SoC architectures. Responsibilities include breaking down architectures into functional sub-blocks, writing specifications, and supporting RTL, physical design, verification, and software prototyping teams.

SiPearl is seeking passionate individuals to contribute to the development of Rhea, a European microprocessor for supercomputing and AI.

Senior FPGA Prototyping Engineer to design and improve the FPGA prototyping workflow for complex CPU designs. Responsibilities include generating, testing, and debugging platforms from RTL using state-of-the-art FPGAs.

System Software Validation Engineer to ensure quality and reliability of software solutions. Design and execute test strategies, develop test cases, and verify firmware/software stacks. Requires 7+ years in software testing and strong technical knowledge.

Senior Emulation Engineer/Team Lead to drive emulation strategy and workflows for complex CPUs. Lead the team, define project tasks, and optimize platform deliveries using ASIC and emulation platform expertise.

Define, document, and drive system architecture for cutting-edge HPC systems. Lead architectural engagements with partners and customers to design optimized HPC nodes. Develop integration, performance measurement, and optimization tools. Contribute to collaborative projects, technical deliverables, and partner workshops. Support customers in migrating applications toward new system architectures.

Emulation Engineer role at SiPearl involves contributing to emulation setup, RTL adaptation, and pre-silicon verification. Key tasks include developing workflows, maintaining models, and supporting platform users. Requires 6+ years in digital ASIC and 4+ years on emulation platforms.

Leads growth of the retrofit business by developing and executing go-to-market strategies and value propositions. Manages complex sales cycles, negotiates deals, and builds client relationships. Drives sustainable growth through pipeline development, customer engagement, and strategic account management.