110 English-speaking jobs in Cannes - Crasse

Senior Satellite Systems Engineer provides resident systems engineering support across satellite procurement phases, including design, integration, and launch. Responsibilities involve reviewing test data and ensuring platform equipment meets performance requirements.

Principal Design Verification Engineer to design and deliver interconnect & memory hierarchy solutions for sophisticated SoCs. Responsibilities include UVM test bench development, RTL verification, and improving verification processes using scripting. Requires strong RTL (Verilog) and UVM skills.

Consulting Systems Engineer relays Public Cloud expertise to sales teams, customers, and partners. Responsibilities include conducting PoVs, researching integrations, and supporting field engineers. Requires pre-sales experience and cloud platform knowledge.

Consulting Systems Engineer relays Public Cloud expertise to sales teams, customers, and partners. Responsibilities include conducting PoVs, researching integrations, and supporting technical discussions for Fortinet's cybersecurity offerings.

Consulting Systems Engineer supporting FortiADC, FortiDDoS, and FortiCASB. Provide second-level pre-sales support, lead technical discussions, and build sales materials for the INTL region. Requires 8 years of technical pre-sales experience.

Verification Engineer needed to verify RISC-V processors and extensions. Develop verification solutions, collaborate with engineers, and define verification strategies. Requires experience with functional processor verification methodologies, CPU architectures, and languages like SystemVerilog, Python, C++, Rust, or Go.

Senior polyglot Software Engineer to design and build security integrations across libraries, focusing on .NET or Java. Own features from prototype to production, driving security value for thousands of applications.

Lead AI Safety definition and implementation for next-gen Automotive Compute Subsystems and SoCs for L4 autonomous driving and robotics. Develop safety architectures aligned with ISO 26262, SOTIF, and other standards.

Senior CAD flow engineer will define, deploy, and improve ASIC development methodology and design flow. Responsibilities include leading tool evaluation and optimization, providing technical support to development teams, and acting as a technical interface with vendors.

Senior IP subsystem SoC architect will define, drive, and evolve IP, subsystem, and SoC architectures. Responsibilities include breaking down architectures into functional sub-blocks, writing specifications, and supporting RTL, physical design, verification, and software prototyping teams.

SiPearl is seeking passionate individuals to contribute to the development of Rhea, a European microprocessor for supercomputing and AI.

Define, document, and drive system architecture for cutting-edge HPC systems. Lead architectural engagements with partners and customers to design optimized HPC nodes. Develop integration, performance measurement, and optimization tools. Contribute to collaborative projects, technical deliverables, and partner workshops. Support customers in migrating applications toward new system architectures.

System Software Validation Engineer to ensure quality and reliability of software solutions. Design and execute test strategies, develop test cases, and verify firmware/software stacks. Requires 7+ years in software testing and strong technical knowledge.

Senior FPGA Prototyping Engineer to design and improve the FPGA prototyping workflow for complex CPU designs. Responsibilities include generating, testing, and debugging platforms from RTL using state-of-the-art FPGAs.

Senior Emulation Engineer/Team Lead to drive emulation strategy and workflows for complex CPUs. Lead the team, define project tasks, and optimize platform deliveries using ASIC and emulation platform expertise.

Emulation Engineer role at SiPearl involves contributing to emulation setup, RTL adaptation, and pre-silicon verification. Key tasks include developing workflows, maintaining models, and supporting platform users. Requires 6+ years in digital ASIC and 4+ years on emulation platforms.

Leads growth of the retrofit business by developing and executing go-to-market strategies and value propositions. Manages complex sales cycles, negotiates deals, and builds client relationships. Drives sustainable growth through pipeline development, customer engagement, and strategic account management.

Experienced Project Engineer needed to manage complex Engineer-to-order projects in a marine environment. Own technical scope, lead discussions with shipyards and customers, and ensure successful project execution from handover to delivery.

Principal Design Verification Engineer to design and deliver interconnect memory hierarchy solutions for sophisticated SoCs. Responsibilities include UVM test bench development, RTL verification, and improving verification processes using scripting and automation.

Principal Design Verification Engineer to design and deliver interconnect & memory hierarchy solutions for sophisticated SoCs. Responsibilities include UVM test bench development, RTL verification, and improving verification processes using scripting.